SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE

PURPOSE: To make the formation of contact holes using an etching stop layer compatible with the formation of a double side wall for relieving the step- difference of a gate electrode. CONSTITUTION: On a semiconductor substrate, a gate electrode 4 is formed via a gate insulating film. A first insulat...

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Bibliographic Details
Main Author KATSUBE MASAKI
Format Patent
LanguageEnglish
Published 11.10.1996
Edition6
Subjects
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Summary:PURPOSE: To make the formation of contact holes using an etching stop layer compatible with the formation of a double side wall for relieving the step- difference of a gate electrode. CONSTITUTION: On a semiconductor substrate, a gate electrode 4 is formed via a gate insulating film. A first insulating film 11 is stuck on the gate electrode 4. By anistropic etching, a first side wall is formed on the side wall of the gate electrode 4. By using the gate electrode 4 and the side wall as masks, a source region 8S and a drain region 8D are formed, on which a second insulating film 12 is stuck. By anisotropic etching, a second side gate is formed. A third insulating film having practically the same etching rate as the second insulating film 12 is stuck on the second side gate. A fourth insulating film is stuck on the third insulating film. Contact holes 13S, 13D are opened as far as the fourth insulating film. A part of the third insulating film and a part of the second insulating film 12 which are left on the bottom parts of the contact holes 13S, 13D are eliminated. A wiring layer is formed from the bottom surfaces of the contact holes 13S, 13D to the upper part of the fourth insulating film.
Bibliography:Application Number: JP19950061333