DATA PREFETCH CONTROL CIRCUIT

PURPOSE:To enable the data prefetch control circuit to prefetch many line data at a single prefetch request and perform prefetching operation for a multivariable data sequence. CONSTITUTION:A prefetch address outputted from a processor unit 11 is stored in a prefetch address queue 14 through a multi...

Full description

Saved in:
Bibliographic Details
Main Author UDA MANABU
Format Patent
LanguageEnglish
Published 19.01.1996
Edition6
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:PURPOSE:To enable the data prefetch control circuit to prefetch many line data at a single prefetch request and perform prefetching operation for a multivariable data sequence. CONSTITUTION:A prefetch address outputted from a processor unit 11 is stored in a prefetch address queue 14 through a multiplexer 17. After line filling operation, the stored prefetch address queue is added to a line size value stored in a line size register 13 by an adder 15 to obtain an updated prefetch address value. This updated value after being stored in the prefetch address queue 14 again through the multiplexer 17 is outputted to a cache unit 12 and data are automatically prefetched. The above operations are repeated.
Bibliography:Application Number: JP19940142790