COMMUNICATION INTERFACE CIRCUIT

PURPOSE:To improve data input/output processing speed by respectively transmitting an address and data by means of private conventional asynchronous transmission/reception circuits UART and generating a write signal from a reception flag which becomes significant at the time of receiving data. CONST...

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Bibliographic Details
Main Author NOGUCHI MASAMI
Format Patent
LanguageEnglish
Published 09.09.1994
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PURPOSE:To improve data input/output processing speed by respectively transmitting an address and data by means of private conventional asynchronous transmission/reception circuits UART and generating a write signal from a reception flag which becomes significant at the time of receiving data. CONSTITUTION:At the time of writing serial communication data, UART 8 only for address transmission, UART 9 only for data transmission and a write signal generation circuit 17 generating the write signal 20 from the reception flag 16 into RAM 13 are provided. When the write signal 20 is generated with timing when the reception flag becomes significant as a trigger by the reception flag 16 of UART 8 only for address transmission, data outputted from UART 9 is written into the address outputted from UART 8 at that time. When a reception flag reset signal 19 is generated in a reception flag reset circuit 18 later than the write signal 20, and UART 8 and UART 9 are reset, a memory unit 11-side waits for a next serial data signal 12.
Bibliography:Application Number: JP19930032045