JPH05308686

PURPOSE:To provide the dissimilar speed branching multiplex circuit making a flexible correspondence to the addition of paths with a little change. CONSTITUTION:Input signals (a), (b), and (c) have different signal speeds, which are converted into the high-speed signals in the internal frame tempora...

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Bibliographic Details
Main Author HAMADA TATSUYOSHI
Format Patent
LanguageEnglish
Published 19.11.1993
Edition5
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
SELECTING
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To provide the dissimilar speed branching multiplex circuit making a flexible correspondence to the addition of paths with a little change. CONSTITUTION:Input signals (a), (b), and (c) have different signal speeds, which are converted into the high-speed signals in the internal frame temporarily in three FAs (11-1 to 11-3) to make the phase of each signal the same. Then they are converted into n-bit parallel signals for one frame of the internal frame (12-1 to 12-3). The three (n)-bit parallel signals are entered in SW 13 forming matrix structure and the branching/array change and multiplexing or the like are performed at the prescribed timing to form two (n)-bit parallel signals. They are converted into (n)-bit serial signals (14-1 and 14-2), then respective (n)-bit serial signals are outputted from the internal frame to the original frame in the shape of signals at the required speed in 17-1 and 17-2.
Bibliography:Application Number: JP19920136203