DATA COMMUNICATION SYSTEM

• Main Authors: NAKAMURA HIROSHI, OKAMOTO NORIYUKI, ASANO HIKARI
• Format: Patent
• Language: English
• Published: 12.09.1989
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION

PURPOSE:To perform stable communication free from data drop-out by providing a processing state monitor circuit which monitors the processing state of a processor to output a load signal proportional to the magnitude of a load and a transmission/reception clock generating circuit which changes transmission/ reception clock frequencies by the load signal. CONSTITUTION:A master station communication equipment 1 and a slave station communication equipment 2 having a processor 3' and a communication control part 4' are connected by a communication line 8. Since a processor 3 performs not only the control of a communication control part 4, namely, data transmission/reception processing but also the processing of transmission/ reception data, the control of a monitor CRT of the slave station communication equipment 2, etc., its load is varied. A processing state monitor circuit 6 monitors an address signal and a control signal outputted from the processor 3 and outputs a load signal 7 indicating busyness of the processor 3. The load signal 7 is inputted to a transmission/reception clock generating circuit 5, and the transmission/reception clock frequency is reduced when the load of the processor 3 is heavy, but this frequency is raised when the load on the processor 3 is light.