SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

• Main Author: SEKINE KEI
• Format: Patent
• Language: English; Japanese
• Published: 25.01.2024
• Subjects: BASIC ELECTRIC ELEMENTS; CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES ORLIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To provide a semiconductor integrated circuit device capable of achieving high specific accuracy in both unit capacitance and parasitic capacitance while suppressing antenna effects.SOLUTION: A semiconductor integrated circuit device of the embodiment is a semiconductor integrated circuit device in which a plurality of metal layers are stacked via an insulator layer and has a capacitive element, and a component comprising a current flow path including a current flow path to the capacitive element is arranged at a position rotationally symmetrical n (n:2 or more integers) times about a predetermined rotation axis perpendicular to a stacking direction of the metal layers.SELECTED DRAWING: Figure 3 【課題】アンテナ効果を抑制しつつ、単位容量と寄生容量の双方で高い比精度を実現することが可能な半導体集積回路装置を提供する。【解決手段】実施形態の半導体集積回路装置は、複数のメタル層が絶縁体層を介して積層され、容量素子を有する半導体集積回路装置であって、メタル層の積層方向に垂直な所定の回転軸に対して、ｎ（ｎ：２以上の整数）回回転対称な位置に容量素子への電流流路を含む電流流路を構成する部材が配置されている。【選択図】図３