SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• Main Authors: OMIZU YUTO, ABIKO YUYA
• Format: Patent
• Language: English; Japanese
• Published: 28.09.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

To improve performance of a semiconductor device including a trench gate type MOSFET in which a p-type impurity is introduced into a bottom of a groove buried with a gate electrode.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: forming a plurality of grooves D1 on a principal surface of an n-type semiconductor substrate SB; forming a p-type semiconductor region R1 in the semiconductor substrate SB by introducing a p-type impurity and carbon into a bottom surface or a side surface of each groove D1; forming a gate electrode via an insulation film inside each of the plurality of grooves D1; and forming a p-type second semiconductor region in the semiconductor substrate SB in contact with a side surface of the groove D1 between adjacent grooves D1.SELECTED DRAWING: Figure 3 【課題】ゲート電極を埋め込む溝の底部にｐ型不純物を導入するトレンチゲート型のＭＯＳＦＥＴを備えた半導体装置の性能を向上させる。【解決手段】ｎ型の半導体基板ＳＢの主面に、複数並ぶ溝Ｄ１を形成する工程、各溝Ｄ１の底面または側面に、ｐ型の不純物と炭素とを導入することで、半導体基板ＳＢ内にｐ型の半導体領域Ｒ１を形成する工程、複数の溝Ｄ１のそれぞれの内側に、絶縁膜を介してゲート電極を形成する工程、隣り合う溝Ｄ１同士の間において、溝Ｄ１の側面に接する半導体基板ＳＢ内に、ｐ型の第２半導体領域を形成する工程を有する、半導体装置の製造方法を用いる。【選択図】図３