RECEIVING CIRCUIT
To provide a receiving circuit which is suppressed in deterioration in noise characteristics thereof within a range of small input current and furthermore can suppress an increase in offset of a differential signal.SOLUTION: A receiving circuit comprises: a transimpedance amplifier that converts int...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English Japanese |
Published |
03.04.2023
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | To provide a receiving circuit which is suppressed in deterioration in noise characteristics thereof within a range of small input current and furthermore can suppress an increase in offset of a differential signal.SOLUTION: A receiving circuit comprises: a transimpedance amplifier that converts into a voltage signal, a current signal input to an input node connected to an input terminal for receiving an input current; a reference voltage circuit that generates a reference voltage depending on a first feedback current; a differential amplifier circuit that generates a differential signal depending on a voltage difference between the voltage signal and the reference voltage; and an offset control circuit that generates the first feedback current and a second feedback current depending on an offset of the differential signal. The offset control circuit, when an average voltage value of the voltage signal is larger than the reference voltage, adjusts the first feedback current so that the offset of the differential signal falls within a predetermined range, and when the average voltage value of the voltage signal is smaller than the reference voltage, subtracts the second feedback current from the input current so that the offset of the differential signal falls within the predetermined range.SELECTED DRAWING: Figure 1
【課題】入力電流が小さい範囲での雑音の劣化を抑制しつつ、差動信号のオフセットの増加を抑制可能な受信回路を提供する。【解決手段】受信回路は、入力電流を受ける入力端子に接続された入力ノードに入力された電流信号を電圧信号に変換するトランスインピーダンスアンプと、第1帰還電流に応じて参照電圧を生成する参照電圧回路と、電圧信号と参照電圧との電圧差に応じて差動信号を生成する差動増幅回路と、差動信号のオフセットに応じて第1帰還電流と第2帰還電流とを生成するオフセット制御回路と、を備え、オフセット制御回路は、電圧信号の平均電圧値が参照電圧より大きいとき、差動信号のオフセットが所定の範囲内に入るように第1帰還電流を調整し、電圧信号の平均電圧値が参照電圧より小さいとき、差動信号のオフセットが所定の範囲内に入るように入力電流から第2帰還電流を減算する。【選択図】図1 |
---|---|
AbstractList | To provide a receiving circuit which is suppressed in deterioration in noise characteristics thereof within a range of small input current and furthermore can suppress an increase in offset of a differential signal.SOLUTION: A receiving circuit comprises: a transimpedance amplifier that converts into a voltage signal, a current signal input to an input node connected to an input terminal for receiving an input current; a reference voltage circuit that generates a reference voltage depending on a first feedback current; a differential amplifier circuit that generates a differential signal depending on a voltage difference between the voltage signal and the reference voltage; and an offset control circuit that generates the first feedback current and a second feedback current depending on an offset of the differential signal. The offset control circuit, when an average voltage value of the voltage signal is larger than the reference voltage, adjusts the first feedback current so that the offset of the differential signal falls within a predetermined range, and when the average voltage value of the voltage signal is smaller than the reference voltage, subtracts the second feedback current from the input current so that the offset of the differential signal falls within the predetermined range.SELECTED DRAWING: Figure 1
【課題】入力電流が小さい範囲での雑音の劣化を抑制しつつ、差動信号のオフセットの増加を抑制可能な受信回路を提供する。【解決手段】受信回路は、入力電流を受ける入力端子に接続された入力ノードに入力された電流信号を電圧信号に変換するトランスインピーダンスアンプと、第1帰還電流に応じて参照電圧を生成する参照電圧回路と、電圧信号と参照電圧との電圧差に応じて差動信号を生成する差動増幅回路と、差動信号のオフセットに応じて第1帰還電流と第2帰還電流とを生成するオフセット制御回路と、を備え、オフセット制御回路は、電圧信号の平均電圧値が参照電圧より大きいとき、差動信号のオフセットが所定の範囲内に入るように第1帰還電流を調整し、電圧信号の平均電圧値が参照電圧より小さいとき、差動信号のオフセットが所定の範囲内に入るように入力電流から第2帰還電流を減算する。【選択図】図1 |
Author | TANAKA KEIJI SUGIMOTO YOSHIYUKI |
Author_xml | – fullname: SUGIMOTO YOSHIYUKI – fullname: TANAKA KEIJI |
BookMark | eNrjYmDJy89L5WQQDHJ1dvUM8_RzV3D2DHIO9QzhYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBkbGBiamhhZmjsZEKQIAH2kf9w |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 受信回路 |
ExternalDocumentID | JP2023045186A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JP2023045186A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 12:47:11 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Japanese |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JP2023045186A3 |
Notes | Application Number: JP20210153448 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230403&DB=EPODOC&CC=JP&NR=2023045186A |
ParticipantIDs | epo_espacenet_JP2023045186A |
PublicationCentury | 2000 |
PublicationDate | 20230403 |
PublicationDateYYYYMMDD | 2023-04-03 |
PublicationDate_xml | – month: 04 year: 2023 text: 20230403 day: 03 |
PublicationDecade | 2020 |
PublicationYear | 2023 |
RelatedCompanies | SUMITOMO ELECTRIC IND LTD |
RelatedCompanies_xml | – name: SUMITOMO ELECTRIC IND LTD |
Score | 3.5913062 |
Snippet | To provide a receiving circuit which is suppressed in deterioration in noise characteristics thereof within a range of small input current and furthermore can... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
Title | RECEIVING CIRCUIT |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230403&DB=EPODOC&locale=&CC=JP&NR=2023045186A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQsTRMMkkzSTHRNU5MM9I1MUwz1rUA1iq6JkkWialpKeapicagzcm-fmYeoSZeEaYRTAzZsL0w4HNCy8GHIwJzVDIwv5eAy-sCxCCWC3htZbF-UiZQKN_eLcTWRQ3aOwaNcBoYq7k42boG-Lv4O6s5O9t6Baj5BUHlTA0tzByZGViB7WhzUHZwDXMCbUspQK5T3AQZ2AKAxuWVCDEwZSUKM3A6w65eE2bg8IXOeAOZ0MxXLMIgGOTq7OoZ5unnruDsGeQc6hkiyqDk5hri7KELNDse7pN4rwAkdxiLMbAAu_ipEgwKScBeR3KypYWxsVkiMOBSLVKNUyzTLMyAfZFEYJClSjJI4zFICq-sNAMXiAdebWIsw8BSUlSaKgusSEuS5MABAACTtXQ_ |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFOfbnIo6P4ZI34rWZF36UMSlrW1du1K6sbfSjxRU0OEq_vteS6d72lvIwZEc_HL5Xe4uALeaktKC5lQmSfEgU6UgMkOvItOUJaLIRyIhVXGy56v2jLqL4aIF7-tamLpP6E_dHBERlSHey_q8Xv4HsYw6t3J1l77i1OejFemG1LDjKsJ5TyRjrJvB1JhyiXPdDSQ_bGRDhalPO7CLd-xRBQdzPq7KUpabPsXqwl6A6j7KQ2i9JT3o8PXXaz3Y95oXbxw24FsdQTc0uenMHf95wJ2Qz5zoGG4sM-K2jLrjv53EbrCxDnICbaT44hQGKbKOLNMYIWqChhNMkFwrmIpcJEGTiTPob1F0vlV6DR078ibxxPFf-nBQSerME3IB7fLrW1yiUy3Tq9oYvzGydzI |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=RECEIVING+CIRCUIT&rft.inventor=SUGIMOTO+YOSHIYUKI&rft.inventor=TANAKA+KEIJI&rft.date=2023-04-03&rft.externalDBID=A&rft.externalDocID=JP2023045186A |