SEMICONDUCTOR STORAGE DEVICE
To provide a semiconductor storage device that can be suitably controlled.SOLUTION: A semiconductor storage device includes a plurality of gate electrodes, a semiconductor layer facing the plurality of gate electrodes, a gate insulating film provided between the plurality of gate electrodes and the...
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Format | Patent |
Language | English Japanese |
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04.04.2022
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Abstract | To provide a semiconductor storage device that can be suitably controlled.SOLUTION: A semiconductor storage device includes a plurality of gate electrodes, a semiconductor layer facing the plurality of gate electrodes, a gate insulating film provided between the plurality of gate electrodes and the semiconductor layer, and a plurality of first wiring connected to the plurality of gate electrodes. In a write sequence executed before the number of executions of the write sequence or the erase sequence reaches a predetermined number of times, a program voltage having a first magnitude is supplied to one of the plurality of first wirings during a first supplying time. In a write sequence executed after the number of executions of the write sequence or the erase sequence reaches a predetermined number of times, a program voltage having a second magnitude is supplied to one of the plurality of first wirings during a second supplying time. The second magnitude is larger than the first magnitude, or the second supplying time is longer than the first supplying time.SELECTED DRAWING: Figure 21
【課題】好適に制御可能な半導体記憶装置を提供する。【解決手段】半導体記憶装置は、複数のゲート電極と、複数のゲート電極に対向する半導体層と、複数のゲート電極と半導体層との間に設けられたゲート絶縁膜と、複数のゲート電極に接続された複数の第1配線と、を備える。書込シーケンス又は消去シーケンスの実行回数が所定回数に達する前に実行される書込シーケンスにおいて、複数の第1配線のうちの一つに、第1の大きさのプログラム電圧が、第1の供給時間の間供給される。書込シーケンス又は消去シーケンスの実行回数が所定回数に達した後に実行される書込シーケンスにおいて、複数の第1配線のうちの一つに、第2の大きさのプログラム電圧が、第2の供給時間の間供給される。第2の大きさが第1の大きさよりも大きく、又は、第2の供給時間が第1の供給時間よりも長い。【選択図】図21 |
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AbstractList | To provide a semiconductor storage device that can be suitably controlled.SOLUTION: A semiconductor storage device includes a plurality of gate electrodes, a semiconductor layer facing the plurality of gate electrodes, a gate insulating film provided between the plurality of gate electrodes and the semiconductor layer, and a plurality of first wiring connected to the plurality of gate electrodes. In a write sequence executed before the number of executions of the write sequence or the erase sequence reaches a predetermined number of times, a program voltage having a first magnitude is supplied to one of the plurality of first wirings during a first supplying time. In a write sequence executed after the number of executions of the write sequence or the erase sequence reaches a predetermined number of times, a program voltage having a second magnitude is supplied to one of the plurality of first wirings during a second supplying time. The second magnitude is larger than the first magnitude, or the second supplying time is longer than the first supplying time.SELECTED DRAWING: Figure 21
【課題】好適に制御可能な半導体記憶装置を提供する。【解決手段】半導体記憶装置は、複数のゲート電極と、複数のゲート電極に対向する半導体層と、複数のゲート電極と半導体層との間に設けられたゲート絶縁膜と、複数のゲート電極に接続された複数の第1配線と、を備える。書込シーケンス又は消去シーケンスの実行回数が所定回数に達する前に実行される書込シーケンスにおいて、複数の第1配線のうちの一つに、第1の大きさのプログラム電圧が、第1の供給時間の間供給される。書込シーケンス又は消去シーケンスの実行回数が所定回数に達した後に実行される書込シーケンスにおいて、複数の第1配線のうちの一つに、第2の大きさのプログラム電圧が、第2の供給時間の間供給される。第2の大きさが第1の大きさよりも大きく、又は、第2の供給時間が第1の供給時間よりも長い。【選択図】図21 |
Author | SAKUMA YU SAITO MASUMI SAKUMA KIWAMU |
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Snippet | To provide a semiconductor storage device that can be suitably controlled.SOLUTION: A semiconductor storage device includes a plurality of gate electrodes, a... |
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SubjectTerms | ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES |
Title | SEMICONDUCTOR STORAGE DEVICE |
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