SEMICONDUCTOR DEVICE
To provide a connection mechanism capable of reducing inductance.SOLUTION: A capacitor 30 has a case 31 including a capacitor element, a first connection terminal 32, a second connection terminal 34, and a second insulation sheet 33 formed between the first connection terminal 32 and the second conn...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English Japanese |
Published |
26.07.2021
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | To provide a connection mechanism capable of reducing inductance.SOLUTION: A capacitor 30 has a case 31 including a capacitor element, a first connection terminal 32, a second connection terminal 34, and a second insulation sheet 33 formed between the first connection terminal 32 and the second connection terminal 34, in which the first connection terminal 32, the second insulation sheet 33 and the second connection terminal 34 are extended from the case 31 to the outside. A semiconductor module 20 has a terminal lamination section in which a first power terminal 22, a first insulation sheet 23 and a second power terminal 24 are successively overlapped. The first power terminal 22 has a first junction region 221 conductively connected to the first connection terminal 32, the second power terminal 24 has a second junction region 241 conductively connected to the second connection terminal 34 and the first insulation sheet 33 has a terrace portion 28 extended in a direction from the second junction region 241 to the first junction region 221 in plan view.SELECTED DRAWING: Figure 5
【課題】インダクタンスを低減できる接続機構を有する。【解決手段】キャパシタ30は、キャパシタ素子を含むケース31、第1接続端子32、第2接続端子34、及び、第1接続端子32と第2接続端子34との間に設けられた第2絶縁シート33を有し、第1接続端子32、第2絶縁シート33及び第2接続端子34がケース31から外部へ延出している。半導体モジュール20は、第1パワー端子22、第1絶縁シート23及び第2パワー端子24が順に重なっている端子積層部を有する。当該第1パワー端子22は、第1接続端子32と導電接続された第1接合領域221を有し、当該第2パワー端子24は、第2接続端子34と導電接続された第2接合領域241を有し、当該第1絶縁シート33は、平面視において第2接合領域241から第1接合領域221に向かう方向へ延伸するテラス部28を有する。【選択図】図5 |
---|---|
AbstractList | To provide a connection mechanism capable of reducing inductance.SOLUTION: A capacitor 30 has a case 31 including a capacitor element, a first connection terminal 32, a second connection terminal 34, and a second insulation sheet 33 formed between the first connection terminal 32 and the second connection terminal 34, in which the first connection terminal 32, the second insulation sheet 33 and the second connection terminal 34 are extended from the case 31 to the outside. A semiconductor module 20 has a terminal lamination section in which a first power terminal 22, a first insulation sheet 23 and a second power terminal 24 are successively overlapped. The first power terminal 22 has a first junction region 221 conductively connected to the first connection terminal 32, the second power terminal 24 has a second junction region 241 conductively connected to the second connection terminal 34 and the first insulation sheet 33 has a terrace portion 28 extended in a direction from the second junction region 241 to the first junction region 221 in plan view.SELECTED DRAWING: Figure 5
【課題】インダクタンスを低減できる接続機構を有する。【解決手段】キャパシタ30は、キャパシタ素子を含むケース31、第1接続端子32、第2接続端子34、及び、第1接続端子32と第2接続端子34との間に設けられた第2絶縁シート33を有し、第1接続端子32、第2絶縁シート33及び第2接続端子34がケース31から外部へ延出している。半導体モジュール20は、第1パワー端子22、第1絶縁シート23及び第2パワー端子24が順に重なっている端子積層部を有する。当該第1パワー端子22は、第1接続端子32と導電接続された第1接合領域221を有し、当該第2パワー端子24は、第2接続端子34と導電接続された第2接合領域241を有し、当該第1絶縁シート33は、平面視において第2接合領域241から第1接合領域221に向かう方向へ延伸するテラス部28を有する。【選択図】図5 |
Author | IKEDA YOSHINARI KATO RYOICHI MURATA YUMA |
Author_xml | – fullname: KATO RYOICHI – fullname: IKEDA YOSHINARI – fullname: MURATA YUMA |
BookMark | eNrjYmDJy89L5WQQCXb19XT293MJdQ7xD1JwcQ3zdHblYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBkaGhgZmRsamjsZEKQIAhQwgyA |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | 半導体装置 |
ExternalDocumentID | JP2021106235A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JP2021106235A3 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 30 05:45:40 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Japanese |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JP2021106235A3 |
Notes | Application Number: JP20190237613 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210726&DB=EPODOC&CC=JP&NR=2021106235A |
ParticipantIDs | epo_espacenet_JP2021106235A |
PublicationCentury | 2000 |
PublicationDate | 20210726 |
PublicationDateYYYYMMDD | 2021-07-26 |
PublicationDate_xml | – month: 07 year: 2021 text: 20210726 day: 26 |
PublicationDecade | 2020 |
PublicationYear | 2021 |
RelatedCompanies | FUJI ELECTRIC CO LTD |
RelatedCompanies_xml | – name: FUJI ELECTRIC CO LTD |
Score | 3.4720795 |
Snippet | To provide a connection mechanism capable of reducing inductance.SOLUTION: A capacitor 30 has a case 31 including a capacitor element, a first connection... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | SEMICONDUCTOR DEVICE |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210726&DB=EPODOC&locale=&CC=JP&NR=2021106235A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQSTJLATYbUsx1k8xTE3VNUhKTdBMNk0CrLAzSkowsUiwNwYck-fqZeYSaeEWYRjAxZMP2woDPCS0HH44IzFHJwPxeAi6vCxCDWC7gtZXF-kmZQKF8e7cQWxc1aO8Y2H8xNzJTc3GydQ3wd_F3VnN2tvUKUPMLAssBez9GxqaOzAyswHa0OWj9l2uYE2hbSgFyneImyMAWADQur0SIgSkrUZiB0xl29ZowA4cvdMYbyIRmvmIRBpFgUJj5-7mEOof4Bym4uIZ5OruKMii5uYY4e-gCjY-HeybeKwDJKcZiDCzAXn6qBIOCiUVyogmw_Z5olGJokgrsRySnpQL7AkZmxgZJSYZJRpIM0ngMksIrK83ABeKBhiSNzGQYWEqKSlNlgXVpSZIcOAwAvRN0Sg |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFOebbsp0fgyRvhXXtGvrQxGXtnR1_WB2Y28laTtQQYer-O97DZ3uaW8hB0dycLn7XXK_ANxxPce0ITdkbhRM1nLGZabw6pXFYMmJmT8ogiQpCHVvpvmL4aIB75teGMET-iPIEdGjMvT3UpzXq_8ili3eVq7v-StOfT66iWVLNTpG_GIQXbJHlhNHdkQlSi0_lsKpkCH6IerwaQ_2Mcc2K6J9Zz6q2lJW2zHFPYaDGNV9lCfQeGNtaNHN12ttOAzqG28c1s637kDnpbJZFNozmkTTvu3Mx9Q5hVvXSagno_r0bzOpH28tRT2DJqL8ogt9zcyYhvk7I7miFYgjsmWBWIDo6oBzhZNz6O1QdLFTegMtLwkm6WQcPvfgqJJU5UmiX0Kz_PourjCulvxa2OMXWCN3Og |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=SEMICONDUCTOR+DEVICE&rft.inventor=KATO+RYOICHI&rft.inventor=IKEDA+YOSHINARI&rft.inventor=MURATA+YUMA&rft.date=2021-07-26&rft.externalDBID=A&rft.externalDocID=JP2021106235A |