OPTICAL RECEPTION CIRCUIT AND OPTICAL RECEIVER

To provide an optical reception circuit and an optical receiver capable of enhancing linearity of a reception signal.SOLUTION: An optical reception circuit comprises: a first input terminal that receives one of a pair of current signals; a second input terminal that receives the other of the pair of...

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Bibliographic Details
Main Authors KUMAGAI SEIJI, SUGIMOTO YOSHIYUKI
Format Patent
LanguageEnglish
Japanese
Published 03.06.2021
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Summary:To provide an optical reception circuit and an optical receiver capable of enhancing linearity of a reception signal.SOLUTION: An optical reception circuit comprises: a first input terminal that receives one of a pair of current signals; a second input terminal that receives the other of the pair of current signals; a first FET including a first current terminal electrically connected with the first input terminal, a second current terminal electrically connected with the second input terminal, and a first control terminal receiving a first control signal; a first TIA that receives a part, which remains after exclusion of a part branched to the first FET, of one of the pair of current signals, and generates one of a pair of voltage signals; a second TIA that receives a part, which remains after exclusion of a part branched to the first FET, of the other of the pair of current signals, and generates the other of the pair of voltage signals; and a control circuit that detects a voltage difference between one of the pair of voltage signals and the other of the pair of voltage signals, and reduces a resistance value of the first FET by changing the first control signal when an amplitude of the voltage difference exceeds a prescribed value.SELECTED DRAWING: Figure 1 【課題】受信信号の線形性を高めることができる光受信用回路および光受信器を提供する。【解決手段】光受信用回路は、一対の電流信号の一方を受ける第1入力端子と、一対の電流信号の他方を受ける第2入力端子と、第1入力端子と電気的に接続される第1電流端子、第2入力端子と電気的に接続される第2電流端子、及び第1制御信号を受ける第1制御端子を有する第1FETと、一対の電流信号の一方のうち第1FETへ分流した一部を除く残部を受けて、一対の電圧信号の一方を生成する第1TIAと、一対の電流信号の他方のうち第1FETへ分流した一部を除く残部を受けて、一対の電圧信号の他方を生成する第2TIAと、一対の電圧信号の一方と一対の電圧信号の他方との電圧差を検出し、電圧差の振幅が所定の値より大きくなったときに第1制御信号を変化させて第1FETの抵抗値を小さくする制御回路とを備える。【選択図】図1
Bibliography:Application Number: JP20190217136