MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

To form an n-type or p-type semiconductor region having high crystallinity, and suppress a decrease in crystallinity of a region outside the semiconductor region.SOLUTION: A manufacturing method of a semiconductor device includes a first step of ion-implanting an impurity into a silicon carbide subs...

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Main Authors ARAUCHI TAKUJI, URAGAMI YASUSHI, ITO TAKAHIRO, SOEJIMA SHIGEMASA
Format Patent
LanguageEnglish
Japanese
Published 18.07.2019
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Abstract To form an n-type or p-type semiconductor region having high crystallinity, and suppress a decrease in crystallinity of a region outside the semiconductor region.SOLUTION: A manufacturing method of a semiconductor device includes a first step of ion-implanting an impurity into a silicon carbide substrate, a second step of ion-implanting at least one of silicon and carbon into an implantation range of the impurity in the silicon carbide substrate, and a step of annealing the silicon carbide substrate after performing the first step and the second step. The depth of the peak of the concentration of the impurity ion-implanted in the first step overlaps with the ion implantation depth of an element implanted in the second step.SELECTED DRAWING: Figure 4 【課題】 結晶性が高いn型またはp型の半導体領域を形成するとともに、その半導体領域の外部の領域の結晶性の低下を抑制する。【解決手段】 半導体装置の製造方法であって、炭化シリコン基板に不純物をイオン注入する第1工程と、前記炭化シリコン基板の前記不純物の注入範囲にシリコンと炭素の少なくとも一方をイオン注入する第2工程と、前記第1工程と前記第2工程を実施した後に前記炭化シリコン基板をアニールする工程を有する。前記第1工程でイオン注入された不純物の濃度のピークの深さと、前記第2工程で注入された元素のイオン注入深さが重複する。【選択図】図4
AbstractList To form an n-type or p-type semiconductor region having high crystallinity, and suppress a decrease in crystallinity of a region outside the semiconductor region.SOLUTION: A manufacturing method of a semiconductor device includes a first step of ion-implanting an impurity into a silicon carbide substrate, a second step of ion-implanting at least one of silicon and carbon into an implantation range of the impurity in the silicon carbide substrate, and a step of annealing the silicon carbide substrate after performing the first step and the second step. The depth of the peak of the concentration of the impurity ion-implanted in the first step overlaps with the ion implantation depth of an element implanted in the second step.SELECTED DRAWING: Figure 4 【課題】 結晶性が高いn型またはp型の半導体領域を形成するとともに、その半導体領域の外部の領域の結晶性の低下を抑制する。【解決手段】 半導体装置の製造方法であって、炭化シリコン基板に不純物をイオン注入する第1工程と、前記炭化シリコン基板の前記不純物の注入範囲にシリコンと炭素の少なくとも一方をイオン注入する第2工程と、前記第1工程と前記第2工程を実施した後に前記炭化シリコン基板をアニールする工程を有する。前記第1工程でイオン注入された不純物の濃度のピークの深さと、前記第2工程で注入された元素のイオン注入深さが重複する。【選択図】図4
Author ARAUCHI TAKUJI
SOEJIMA SHIGEMASA
URAGAMI YASUSHI
ITO TAKAHIRO
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Snippet To form an n-type or p-type semiconductor region having high crystallinity, and suppress a decrease in crystallinity of a region outside the semiconductor...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
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