SEMICONDUCTOR MEMORY, AND METHOD OF DEFINING DATA IN SEMICONDUCTOR MEMORY

To provide a semiconductor memory capable of storing multi-value data while suppressing an increase in threshold voltage set in a memory cell.SOLUTION: A semiconductor memory according to one embodiment comprises a plurality of memory cell pairs having a first memory cell and a second memory cell. T...

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Main Author NAGASE HIROKAZU
Format Patent
LanguageEnglish
Japanese
Published 06.06.2019
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Abstract To provide a semiconductor memory capable of storing multi-value data while suppressing an increase in threshold voltage set in a memory cell.SOLUTION: A semiconductor memory according to one embodiment comprises a plurality of memory cell pairs having a first memory cell and a second memory cell. The first memory cell is configured to allow at least one threshold voltage Vth1 to be set, the second memory cell is configured to allow a plurality of threshold voltages Vth2-Vth4 to be set. Each data stored in the memory cell pairs is defined using each difference between each threshold voltage Vth2-Vth4 of the second memory cell and the threshold voltage Vth1 of the first memory cell.SELECTED DRAWING: Figure 4 【課題】メモリセルに設定する閾値電圧が高くなることを抑制しつつ多値データを格納可能な半導体記憶装置を提供することである。【解決手段】一実施の形態にかかる半導体記憶装置は、第1のメモリセルと第2のメモリセルとを備えるメモリセル対を複数有する。第1のメモリセルは少なくとも1つの閾値電圧Vth1を設定可能に構成されており、第2のメモリセルは複数の閾値電圧Vth2〜Vth4を設定可能に構成されている。メモリセル対に格納される各々のデータは、第2のメモリセルの各々の閾値電圧Vth2〜Vth4と第1のメモリセルの閾値電圧Vth1との各々の差を用いて定義される。【選択図】図4
AbstractList To provide a semiconductor memory capable of storing multi-value data while suppressing an increase in threshold voltage set in a memory cell.SOLUTION: A semiconductor memory according to one embodiment comprises a plurality of memory cell pairs having a first memory cell and a second memory cell. The first memory cell is configured to allow at least one threshold voltage Vth1 to be set, the second memory cell is configured to allow a plurality of threshold voltages Vth2-Vth4 to be set. Each data stored in the memory cell pairs is defined using each difference between each threshold voltage Vth2-Vth4 of the second memory cell and the threshold voltage Vth1 of the first memory cell.SELECTED DRAWING: Figure 4 【課題】メモリセルに設定する閾値電圧が高くなることを抑制しつつ多値データを格納可能な半導体記憶装置を提供することである。【解決手段】一実施の形態にかかる半導体記憶装置は、第1のメモリセルと第2のメモリセルとを備えるメモリセル対を複数有する。第1のメモリセルは少なくとも1つの閾値電圧Vth1を設定可能に構成されており、第2のメモリセルは複数の閾値電圧Vth2〜Vth4を設定可能に構成されている。メモリセル対に格納される各々のデータは、第2のメモリセルの各々の閾値電圧Vth2〜Vth4と第1のメモリセルの閾値電圧Vth1との各々の差を用いて定義される。【選択図】図4
Author NAGASE HIROKAZU
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DocumentTitleAlternate 半導体記憶装置、及び半導体記憶装置におけるデータの定義方法
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Snippet To provide a semiconductor memory capable of storing multi-value data while suppressing an increase in threshold voltage set in a memory cell.SOLUTION: A...
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Title SEMICONDUCTOR MEMORY, AND METHOD OF DEFINING DATA IN SEMICONDUCTOR MEMORY
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