TRANSIMPEDANCE AMPLIFIER CIRCUIT AND VARIABLE GAIN AMPLIFIER
To improve linearity of an output signal with respect to an input signal.SOLUTION: A variable gain amplifier circuit 13 of a transimpedance amplifier circuit generates a pair of output signals Vout1 and Vout2 according to a voltage signal Vin and a reference signal Vref. A differential circuit 23 of...
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Main Author | |
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Format | Patent |
Language | English Japanese |
Published |
07.03.2019
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Subjects | |
Online Access | Get full text |
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Summary: | To improve linearity of an output signal with respect to an input signal.SOLUTION: A variable gain amplifier circuit 13 of a transimpedance amplifier circuit generates a pair of output signals Vout1 and Vout2 according to a voltage signal Vin and a reference signal Vref. A differential circuit 23 of the variable gain amplifier 13 includes: a transistor 31 having a base to which the voltage signal Vin is input; a transistor 32 having a base to which the reference signal Vref is input; and a variable resistance circuit 33 having a plurality of FETs 35_1 to 35_N, each source of which is connected to an emitter of a transistor 31 and each drain of which is connected to an emitter of the transistor 32. On/off states of a plurality of FETs are switched by linearity adjustment signals Vctl_1 to Vctl_N, so that a resistance value of the variable resistance circuit 33 increases as an amplitude of the voltage signal Vin increases.SELECTED DRAWING: Figure 2
【課題】入力信号に対する出力信号の線形性を改善すること。【解決手段】トランスインピーダンス増幅回路の利得可変増幅回路13は、電圧信号Vin及び基準信号Vrefに応じて一対の出力信号Vout1,Vout2を生成する。利得可変増幅器13の差動回路23は、電圧信号Vinが入力されるベースを有するトランジスタ31と、基準信号Vrefが入力されるベースを有するトランジスタ32と、それぞれのソースがトランジスタ31のエミッタに接続されるとともにそれぞれのドレインがトランジスタ32のエミッタに接続された複数のFET35_1〜35_Nを有する可変抵抗回路33と、を備える。電圧信号Vinの振幅が大きいほど可変抵抗回路33の抵抗値が大きくなるように、複数のFETのオン状態とオフ状態とが線形性調整信号Vctl_1〜Vctl_Nによって切り替えられる。【選択図】図2 |
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Bibliography: | Application Number: JP20170156407 |