AMPLIFIER CIRCUIT

• Main Author: SUGIMOTO YOSHIYUKI
• Format: Patent
• Language: English; Japanese
• Published: 29.11.2018
• Subjects: AMPLIFIERS; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY

PROBLEM TO BE SOLVED: To provide an amplifier circuit capable of reducing a power consumption.SOLUTION: A feed-back amplifier 30 comprises: an input terminal INP to which one input signal is input; an input terminal INN to which the other input signal is input; a pair of diodes 53 to which an anode is connected to the input terminals INP and INN side; a bias current source 54 that supplies a current to each of the pair of diodes 53 while being connected to a cathode of the pair of diodes 53; an op-amplifier 56 with a CMOS structure that is connected to the cathode of the pair of diodes 53, and amplifies a difference signal of a signal generated in the cathode of the pair of diodes 53; a capacitive element 57 connected between the input and output of the op-amplifier 56; and a difference amplifier 52 that is provided between the input terminals INP and INN and the op-amplifier 56, and includes a pair of bipolar transistors 63a and 63b that amplify the input signal. The bias current source 54 includes a current mirror circuit part 55.SELECTED DRAWING: Figure 2 【課題】低消費電力化が可能な増幅回路を実現する。【解決手段】帰還用アンプ３０は、一方の入力信号が入力される入力端子ＩＮＰと、他方の入力信号が入力される入力端子ＩＮＮと、入力端子ＩＮＰ，ＩＮＮ側にアノードが接続されたダイオード対５３と、ダイオード対５３のカソードにそれぞれ接続され、ダイオード対５３のそれぞれに電流を供給するバイアス電流源５４と、ダイオード対５３のカソードに接続され、ダイオード対５３のカソードに生じた信号の差信号を増幅するＣＭＯＳ構成のオペアンプ５６と、オペアンプ５６の入出力間に接続された容量素子５７と、オペアンプ５６と入力端子ＩＮＰ，ＩＮＮとの間に設けられ、入力信号を増幅するバイポーラトランジスタ対６３ａ，６３ｂを含む差動アンプ５２とを備え、バイアス電流源５４は、カレントミラー回路部５５を含む。【選択図】図２