PROCESSOR CONFIGURED TO PERFORM TRANSACTIONAL MEMORY OPERATIONS
PROBLEM TO BE SOLVED: To atomically update both data and its corresponding write index entry.SOLUTION: In a particular embodiment, a very long instruction word (VLIW) processor is operable to execute VLIW instructions. At least one of the VLIW instructions includes a first load or store instruction...
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| Format | Patent |
| Language | English Japanese |
| Published |
18.08.2016
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| Abstract | PROBLEM TO BE SOLVED: To atomically update both data and its corresponding write index entry.SOLUTION: In a particular embodiment, a very long instruction word (VLIW) processor is operable to execute VLIW instructions. At least one of the VLIW instructions includes a first load or store instruction and a second load or store instruction. The first instruction and the second instruction are executed as a single atomic unit. At least one of the first and second instructions is a store-conditional instruction.SELECTED DRAWING: Figure 3
【課題】データとその対応する書込みインデックスエントリの両方をアトミックに更新する。【解決手段】特定の実施形態では、超長命令語(VLIW)プロセッサは、VLIW命令を実行するよう動作可能である。VLIW命令のうちの少なくとも1つは、第1のロードまたはストア命令および第2のロードまたはストア命令を含む。第1の命令および第2の命令は、単一のアトミック単位として実行される。第1および第2の命令のうちの少なくとも1つは、条件付きストア命令である。【選択図】図３ |
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| AbstractList | PROBLEM TO BE SOLVED: To atomically update both data and its corresponding write index entry.SOLUTION: In a particular embodiment, a very long instruction word (VLIW) processor is operable to execute VLIW instructions. At least one of the VLIW instructions includes a first load or store instruction and a second load or store instruction. The first instruction and the second instruction are executed as a single atomic unit. At least one of the first and second instructions is a store-conditional instruction.SELECTED DRAWING: Figure 3
【課題】データとその対応する書込みインデックスエントリの両方をアトミックに更新する。【解決手段】特定の実施形態では、超長命令語(VLIW)プロセッサは、VLIW命令を実行するよう動作可能である。VLIW命令のうちの少なくとも1つは、第1のロードまたはストア命令および第2のロードまたはストア命令を含む。第1の命令および第2の命令は、単一のアトミック単位として実行される。第1および第2の命令のうちの少なくとも1つは、条件付きストア命令である。【選択図】図３ |
| Author | ERICH J PLONDKE AJAY A INGLE LUCIAN CODRESCU |
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| DocumentTitleAlternate | トランザクションメモリ動作を実行するように構成されたプロセッサ |
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| Notes | Application Number: JP20160098483 |
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| RelatedCompanies | QUALCOMM INC |
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| Snippet | PROBLEM TO BE SOLVED: To atomically update both data and its corresponding write index entry.SOLUTION: In a particular embodiment, a very long instruction word... |
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| SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| Title | PROCESSOR CONFIGURED TO PERFORM TRANSACTIONAL MEMORY OPERATIONS |
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