INTEGRATED CAPACITANCE SENSING MODULE AND ASSOCIATED SYSTEM
PROBLEM TO BE SOLVED: To provide an integrated capacitance sensing module and an associated system.SOLUTION: An integrated capacitance sensing module includes a silicon substrate 510, first, second and third intermediate dielectric layers 520, 532, 533, a plurality of conducting layers 521-52m, a sh...
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07.07.2016
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Abstract | PROBLEM TO BE SOLVED: To provide an integrated capacitance sensing module and an associated system.SOLUTION: An integrated capacitance sensing module includes a silicon substrate 510, first, second and third intermediate dielectric layers 520, 532, 533, a plurality of conducting layers 521-52m, a shielding layer 530, lower and upper sensing electrode layers 541, 542, a protective coating layer 545. An embedded memory and a sensing circuit are constructed in the silicon substrate (510). The first intermediate dielectric layer 520 covers the silicon substrate 510. The plurality of conducting layers 521-52m are formed over the first intermediate dielectric layer 520. The shielding layer 530 is formed over the plurality of conducting layers 521-52m. The second intermediate dielectric layer 532 covers the shielding layer 530. The lower and upper sensing electrode layers 541, 542 and the protective coating layer 545 are formed over the second intermediate dielectric layer 532.SELECTED DRAWING: Figure 5E
【課題】統合キャパシタンス検知モジュールおよび関連システムを提供する。【解決手段】シリコン基板510、第1、第2および第3の中間誘電体層520、532、533、複数の導電層521〜52m、遮蔽層530、下側および上側検知電極層541、542、保護被膜層545を具備する。シリコン基板(510)には、埋め込みメモリおよび検知回路が構成されている。第1の中間誘電体層520は、シリコン基板510を覆っている。複数の導電層521〜52mは、第1の中間誘電体層520の上に形成されている。遮蔽層530は、複数の導電層521〜52mの上に形成されている。第2の中間誘電体層532は、遮蔽層530を覆っている。下側および上側検知電極層541、542、保護被膜層545は、第2の中間誘電体層532の上に形成されている。【選択図】図5E |
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AbstractList | PROBLEM TO BE SOLVED: To provide an integrated capacitance sensing module and an associated system.SOLUTION: An integrated capacitance sensing module includes a silicon substrate 510, first, second and third intermediate dielectric layers 520, 532, 533, a plurality of conducting layers 521-52m, a shielding layer 530, lower and upper sensing electrode layers 541, 542, a protective coating layer 545. An embedded memory and a sensing circuit are constructed in the silicon substrate (510). The first intermediate dielectric layer 520 covers the silicon substrate 510. The plurality of conducting layers 521-52m are formed over the first intermediate dielectric layer 520. The shielding layer 530 is formed over the plurality of conducting layers 521-52m. The second intermediate dielectric layer 532 covers the shielding layer 530. The lower and upper sensing electrode layers 541, 542 and the protective coating layer 545 are formed over the second intermediate dielectric layer 532.SELECTED DRAWING: Figure 5E
【課題】統合キャパシタンス検知モジュールおよび関連システムを提供する。【解決手段】シリコン基板510、第1、第2および第3の中間誘電体層520、532、533、複数の導電層521〜52m、遮蔽層530、下側および上側検知電極層541、542、保護被膜層545を具備する。シリコン基板(510)には、埋め込みメモリおよび検知回路が構成されている。第1の中間誘電体層520は、シリコン基板510を覆っている。複数の導電層521〜52mは、第1の中間誘電体層520の上に形成されている。遮蔽層530は、複数の導電層521〜52mの上に形成されている。第2の中間誘電体層532は、遮蔽層530を覆っている。下側および上側検知電極層541、542、保護被膜層545は、第2の中間誘電体層532の上に形成されている。【選択図】図5E |
Author | LEE WEN-HAO LIU HSINOU CHEN WEI-REN YANG CHING-SUNG |
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DocumentTitleAlternate | 統合キャパシタンス検知モジュールおよび関連システム |
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Snippet | PROBLEM TO BE SOLVED: To provide an integrated capacitance sensing module and an associated system.SOLUTION: An integrated capacitance sensing module includes... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
Title | INTEGRATED CAPACITANCE SENSING MODULE AND ASSOCIATED SYSTEM |
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