MODULAR EXPONENTIATION ARITHMETIC UNIT, IC CARD, MODULAR EXPONENTIATION ARITHMETIC METHOD, AND MODULAR EXPONENTIATION ARITHMETIC PROGRAM

• Main Author: HANDA FUKIO
• Format: Patent
• Language: English; Japanese
• Published: 18.01.2016
• Subjects: ADVERTISING; CODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHERPURPOSES INVOLVING THE NEED FOR SECRECY; CRYPTOGRAPHY; DISPLAY; EDUCATION; PHYSICS; SEALS

PROBLEM TO BE SOLVED: To provide a modular exponentiation arithmetic unit, an IC card, a modular exponentiation arithmetic method, and a modular exponentiation arithmetic program so as to be capable of effectively dealing with an attack such as "Bypass Fault Attack".SOLUTION: A modular exponentiation arithmetic unit counts, when a public key index e is expressed as a binary digit representation e(k(bit length of e)>i≥0) and while repeating operations consisting of k times square residue arithmetics and the number of bits times multiplication remainder arithmetics to be e=1, the times of operations of the square residue arithmetics or the multiplication remainder arithmetics, compares the counted times of operations with a predetermined number of times, determines whether it is abnormal or not on the basis of the comparison result, and performs an error processing if it is determined to be abnormal. 【課題】"Bypass Fault Attack"等の攻撃に対して有効に対応することが可能な、べき乗剰余演算装置、ＩＣカード、べき乗剰余演算方法、及び、べき乗剰余演算プログラムを提供する。【解決手段】本発明は、公開鍵指数ｅを２進数表現ｅｉ（ｋ（ｅのビット長）＞ｉ≧０）としたときに、ｋ回の二乗剰余演算と、ｅｉ＝１となるビットの数と等しい回数の乗算剰余演算との繰り返し演算中に、前記二乗剰余演算または前記乗算剰余演算の演算回数をカウントし、カウントされた前記演算回数と予め設定された設定回数とを比較し、当該比較結果に基づいて異常であるか否かを判定し、異常であると判定された場合、エラー処理を行う。【選択図】図２