NON-VOLATILE SEMICONDUCTOR MEMORY AND VOLTAGE TRIMMING METHOD FOR THE SAME

PROBLEM TO BE SOLVED: To provide a highly reliable non-volatile semiconductor memory.SOLUTION: A non-volatile semiconductor memory includes: a plurality of blocks each of which has a plurality of memory cells; a plurality of bit lines; a plurality of sense amplifier circuits each of which has a firs...

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Main Author FUJIMURA SUSUMU
Format Patent
LanguageEnglish
Published 24.02.2014
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Abstract PROBLEM TO BE SOLVED: To provide a highly reliable non-volatile semiconductor memory.SOLUTION: A non-volatile semiconductor memory includes: a plurality of blocks each of which has a plurality of memory cells; a plurality of bit lines; a plurality of sense amplifier circuits each of which has a first transistor; a plurality of second transistors arranged at positions close to the sense amplifier circuits of the plurality of bit lines, and connected to each of the plurality of bit lines; a plurality of third transistors arranged at positions far from the sense amplifier circuits of the plurality of bit lines, and connected to each of the plurality of bit lines; a source line; and a control circuit. The control circuit changes a voltage to be applied to the control line of the plurality of first transistors on the basis of a trimming voltage by which currents flowing in the control line to the plurality of second transistors and the plurality of third transistors are made the same when a first voltage is applied to the bit lines in accordance with the position of the selected block in which the plurality of selected memory cells are arranged.
AbstractList PROBLEM TO BE SOLVED: To provide a highly reliable non-volatile semiconductor memory.SOLUTION: A non-volatile semiconductor memory includes: a plurality of blocks each of which has a plurality of memory cells; a plurality of bit lines; a plurality of sense amplifier circuits each of which has a first transistor; a plurality of second transistors arranged at positions close to the sense amplifier circuits of the plurality of bit lines, and connected to each of the plurality of bit lines; a plurality of third transistors arranged at positions far from the sense amplifier circuits of the plurality of bit lines, and connected to each of the plurality of bit lines; a source line; and a control circuit. The control circuit changes a voltage to be applied to the control line of the plurality of first transistors on the basis of a trimming voltage by which currents flowing in the control line to the plurality of second transistors and the plurality of third transistors are made the same when a first voltage is applied to the bit lines in accordance with the position of the selected block in which the plurality of selected memory cells are arranged.
Author FUJIMURA SUSUMU
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Snippet PROBLEM TO BE SOLVED: To provide a highly reliable non-volatile semiconductor memory.SOLUTION: A non-volatile semiconductor memory includes: a plurality of...
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Title NON-VOLATILE SEMICONDUCTOR MEMORY AND VOLTAGE TRIMMING METHOD FOR THE SAME
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