CACHE MEMORY DEVICE, PROCESSOR, AND INFORMATION PROCESSOR

• Main Authors: KIMURA TETSUO, FUJISAKI KOICHI, TOYAMA HARUHIKO, KANAI TATSUNORI
• Format: Patent
• Language: English
• Published: 11.04.2013
• Subjects: CALCULATING; CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; PHYSICS; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE

PROBLEM TO BE SOLVED: To provide a cache memory device which can achieve sufficient reduction in power consumption.SOLUTION: A cache memory device 100a caches data of a storage device. The cache memory device 100a comprises a storage unit 110a and a control unit 120a. The storage unit 110a comprises a plurality of cache lines. When the number of dirty cache lines including data which is not written in the storage device among the cache lines exceeds the predetermined number, the control unit 120a writes the data of the dirty cache lines in the storage device.