MANUFACTURING METHOD OF MULTILAYER WIRING BOARD
PROBLEM TO BE SOLVED: To provide a manufacturing method which enables a multilayer wiring board having a preferably shaped inner layer wiring pattern to be relatively easily manufactured despite the fact that the strictness is not required for removal work of a conductive material during the pattern...
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Format | Patent |
Language | English |
Published |
04.04.2013
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Online Access | Get full text |
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Abstract | PROBLEM TO BE SOLVED: To provide a manufacturing method which enables a multilayer wiring board having a preferably shaped inner layer wiring pattern to be relatively easily manufactured despite the fact that the strictness is not required for removal work of a conductive material during the pattern formation.SOLUTION: In a manufacturing method of a multilayer wiring board K1 of this invention, a barrier layer 61 is formed on a lower layer side resin insulation layer 16. Then, laser processing is performed simultaneously to the barrier layer 61 and the lower layer side resin insulation layer 16. An opening 63, penetrating through the barrier layer 61, is formed by this processing, and a groove 62 for inner layer wiring pattern formation, which communicates with the opening 63, is formed at the lower layer side resin insulation layer 16. Subsequently, the groove 62 and the opening 63 are buried with a conductive material 42 that should become an inner layer wiring pattern 28. Then, the barrier layer 61 is selectively removed. An upper layer side resin insulation layer 30 is formed on the lower layer side resin insulation layer 16 to bury the inner layer wiring pattern 28 between the lower layer side resin insulation layer 16 and the upper layer side resin insulation layer 30. |
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AbstractList | PROBLEM TO BE SOLVED: To provide a manufacturing method which enables a multilayer wiring board having a preferably shaped inner layer wiring pattern to be relatively easily manufactured despite the fact that the strictness is not required for removal work of a conductive material during the pattern formation.SOLUTION: In a manufacturing method of a multilayer wiring board K1 of this invention, a barrier layer 61 is formed on a lower layer side resin insulation layer 16. Then, laser processing is performed simultaneously to the barrier layer 61 and the lower layer side resin insulation layer 16. An opening 63, penetrating through the barrier layer 61, is formed by this processing, and a groove 62 for inner layer wiring pattern formation, which communicates with the opening 63, is formed at the lower layer side resin insulation layer 16. Subsequently, the groove 62 and the opening 63 are buried with a conductive material 42 that should become an inner layer wiring pattern 28. Then, the barrier layer 61 is selectively removed. An upper layer side resin insulation layer 30 is formed on the lower layer side resin insulation layer 16 to bury the inner layer wiring pattern 28 between the lower layer side resin insulation layer 16 and the upper layer side resin insulation layer 30. |
Author | HIDA TOSHINORI |
Author_xml | – fullname: HIDA TOSHINORI |
BookMark | eNrjYmDJy89L5WTQ93X0C3VzdA4JDfL0c1fwdQ3x8HdR8HdT8A31CfH0cYx0DVII9wTLOfk7BrnwMLCmJeYUp_JCaW4GJTfXEGcP3dSC_PjU4oLE5NS81JJ4rwAjA0NjAzMjI0tjR2OiFAEAXGUoSg |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | JP2013062293A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JP2013062293A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 11:40:50 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JP2013062293A3 |
Notes | Application Number: JP20110198193 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130404&DB=EPODOC&CC=JP&NR=2013062293A |
ParticipantIDs | epo_espacenet_JP2013062293A |
PublicationCentury | 2000 |
PublicationDate | 20130404 |
PublicationDateYYYYMMDD | 2013-04-04 |
PublicationDate_xml | – month: 04 year: 2013 text: 20130404 day: 04 |
PublicationDecade | 2010 |
PublicationYear | 2013 |
RelatedCompanies | NGK SPARK PLUG CO LTD |
RelatedCompanies_xml | – name: NGK SPARK PLUG CO LTD |
Score | 2.8905067 |
Snippet | PROBLEM TO BE SOLVED: To provide a manufacturing method which enables a multilayer wiring board having a preferably shaped inner layer wiring pattern to be... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
Title | MANUFACTURING METHOD OF MULTILAYER WIRING BOARD |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130404&DB=EPODOC&locale=&CC=JP&NR=2013062293A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1ZS8NAEB5qFfVNq1KtShDJW2iOTTc-BMlJGpqDkGh9KjlBhLTYiH_f3bXVPvVt2YHZi9lvj29mAB4lta7yqswFtRaRgJS6ETTq4EPjkuRag5-agjo4B-HEy5A_V-c9-Nj6wrA4od8sOCKxqJLYe8f269X_I5bNuJXrcfFOqpbPbqrb_OZ2TDZkRBbdNnUnjuzI4i1L92M-TH5lE5mAm3EAh-QcjSn_y3kxqVvKahdT3DM4iom6tjuHXt0O4MTapl4bwHGw-fEmxY3xrS9gHBhh5hpWmlEGAxc4qRfZXORyQTZLpzPjzUm41ymTmZGR2Jfw4Dqp5Qmk5cXfOBd-vNNL5Qr67bKth8BhUWzUpiJohhsky7goFYQLXBaSVlW4kq5htEfRzV7pCE5lluCB0lFuod99ftV3BGa74p5Nzw8eDnyv |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1ZS8NAEB5qFeubVkWtRxDJW2iaoxsfgqQ5SGouQqL1KeQEEdJiI_59d9dU-9S3ZQdmL2a_PeabAXiYyFWZlUXGyRUvcZJY1ZxCCD4kLkmm1OixzgnB2fOndiLNF_KiBx8bLgyNE_pNgyNiiyqwvbd0v179P2IZ1LdyPc7fcdXyyYpVg-1ux3hDlvCiGzPVDAMj0FldV-ch60e_sqmAwU3bg318xlZIoH3zZUZoKattTLGO4SDE6pr2BHpVM4SBvkm9NoRDr_vxxsXO-NanMPY0P7E0PU6IBwPjmbEdGExgMV7ixo6rvZkR8-pQ2SzQIuMM7i0z1m0Ot5z-jTOdh1u9FM-h3yyb6gIYxPO1XJcYzVAtCQLKC1FCOSryiVKWqJxcwmiHoqud0jsY2LHnpq7jP4_gSKDJHohryjX028-v6gZDbpvf0qn6AR7Ef58 |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=MANUFACTURING+METHOD+OF+MULTILAYER+WIRING+BOARD&rft.inventor=HIDA+TOSHINORI&rft.date=2013-04-04&rft.externalDBID=A&rft.externalDocID=JP2013062293A |