SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To carry out an optimum voltage control according to the leak current component of a memory cell to largely reduce a leak current.SOLUTION: In a resume standby mode, when a leak kind determination circuit 7 determines that the component of leak current includes much gate leak a...

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Bibliographic Details
Main Author YAMAKI TAKASHI
Format Patent
LanguageEnglish
Published 17.05.2012
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To carry out an optimum voltage control according to the leak current component of a memory cell to largely reduce a leak current.SOLUTION: In a resume standby mode, when a leak kind determination circuit 7 determines that the component of leak current includes much gate leak and much substrate leak, a VDDR regulator 5 generates a power supply voltage VDDR of a first voltage level which is lower than a power supply voltage VDD and supplies this power supply voltage as a power supply voltage VDDR1 to an SRAM module 12 via a changeover switch 9. When the leak kind determination circuit 7 determines that channel leak is much, the VDDR regulator 5 supplies the power supply voltage VDDR1, which is higher than the first voltage level and lower than the power supply voltage VDD, to the SRAM module 12. An ARVSS regulator 6 supplies a cell source power supply voltage ARVSS1, which is higher than a reference voltage VSS, to the SRAM module 12 of a region 2.
Bibliography:Application Number: JP20110033333