SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor device preventing occurrence of disconnection of upper layer wiring due to stress even if width of wiring is not more than 0.4 μm. SOLUTION: A second interlayer insulating film 5 is laminated on first wiring 4 formed on a prescribed pattern. A second...

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Bibliographic Details
Main Authors NAKAO YUICHI, KAGEYAMA SATOSHI
Format Patent
LanguageEnglish
Published 14.05.2009
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor device preventing occurrence of disconnection of upper layer wiring due to stress even if width of wiring is not more than 0.4 μm. SOLUTION: A second interlayer insulating film 5 is laminated on first wiring 4 formed on a prescribed pattern. A second wiring groove 6 which is dug down from an upper face is formed in the second interlayer insulating film 5. Second wiring 7 which is formed of Cu and has wiring width of not more than 0.4 μm is buried in the second wiring groove 6. In a region where first wiring 4 is not formed by a plane view, a thick part groove 10 which is dug down from a base of the second wiring groove 6 is formed in the second interlayer insulating film 5. Second wiring 7 has a thick part 11 which is integrally formed by filling the thick part groove 10 with a metallic material that is the same as second wiring 7. COPYRIGHT: (C)2009,JPO&INPIT
Bibliography:Application Number: JP20070274044