SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

• Main Author: YASUHARA TAKESHI
• Format: Patent
• Language: English
• Published: 02.06.2005
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method including a capacitance element (for instance, a MIM capacitance element) having a large margin for a leak current, and capable of easily leveling an interlayer insulating film by decreasing a step of the interlayer insulating film when forming the capacitance element. SOLUTION: A first electrode (a lower electrode) 2a of the capacitance element is formed on the surface of an insulating film 1 formed on the semiconductor substrate. A first interlayer insulating film 3 is formed by coating an end of a periphery part of the first electrode (a lower electrode) 2a and then a dielectric film (5) and a second metal layer (6) are formed. An element dielectric film part 5a is formed in a horse-shoe shape on an inside periphery of the first interlayer insulating film 3, and a second electrode (an upper electrode) 6a is formed in the concave part by leveling the first interlayer insulating film 3 by the chemical mechanical polishing method. A second interlayer insulating film (7) 7a is laminated on the surface of the first interlayer insulating film 3 to form second layer interconnections (interconnections) 10a, 10b on the leveled surface through conductive plugs 9a, 9b. COPYRIGHT: (C)2005,JPO&NCIPI