SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a semiconductor device having high density capacitance elements wherein the number of manufacturing processes is reduced, dependency upon an applied voltage is little, a two-dimensional size is small, and connection resistance is reduced, and to provide a manufacturi...

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Main Author TAKENAKA MOTOHIRO
Format Patent
LanguageEnglish
Published 26.09.2003
Edition7
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Abstract PROBLEM TO BE SOLVED: To provide a semiconductor device having high density capacitance elements wherein the number of manufacturing processes is reduced, dependency upon an applied voltage is little, a two-dimensional size is small, and connection resistance is reduced, and to provide a manufacturing method of the device. SOLUTION: A semiconductor elements TR1, TR2 are formed in a semiconductor substrate 101 by dividing a digital circuit region and an analog circuit region. Contact plugs 110, 109 of a lower layer are formed in an interlayer insulating film 108 covering the semiconductor elements. Lower electrodes 112a, 112b connected with the contact plugs of the lower layer, capacitance insulating films 113a, 113b and upper electrodes 114a, 114b, 115 and 115b are laminated on the interlayer insulating film 108, thereby constituting the capacitance elements C1, C2 of MIM structure. After an upper layer insulating film 118 is formed, contact plugs 116a, 116b of an upper layer connected with upper electrodes of the respective capacitance elements are formed, and wiring 117 connected with contacts of the upper layer is formed on the upper insulating film. COPYRIGHT: (C)2003,JPO
AbstractList PROBLEM TO BE SOLVED: To provide a semiconductor device having high density capacitance elements wherein the number of manufacturing processes is reduced, dependency upon an applied voltage is little, a two-dimensional size is small, and connection resistance is reduced, and to provide a manufacturing method of the device. SOLUTION: A semiconductor elements TR1, TR2 are formed in a semiconductor substrate 101 by dividing a digital circuit region and an analog circuit region. Contact plugs 110, 109 of a lower layer are formed in an interlayer insulating film 108 covering the semiconductor elements. Lower electrodes 112a, 112b connected with the contact plugs of the lower layer, capacitance insulating films 113a, 113b and upper electrodes 114a, 114b, 115 and 115b are laminated on the interlayer insulating film 108, thereby constituting the capacitance elements C1, C2 of MIM structure. After an upper layer insulating film 118 is formed, contact plugs 116a, 116b of an upper layer connected with upper electrodes of the respective capacitance elements are formed, and wiring 117 connected with contacts of the upper layer is formed on the upper insulating film. COPYRIGHT: (C)2003,JPO
Author TAKENAKA MOTOHIRO
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Snippet PROBLEM TO BE SOLVED: To provide a semiconductor device having high density capacitance elements wherein the number of manufacturing processes is reduced,...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
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