MEMORIA DINAMICA AVENTE UNA STRUTTURA A TRINCEA DROGATA SULLA PARETE LATERALE E CONDENSATORE IMPILATO E RELATIVO METODO DI FABBRICAZIONE

A DRAM cell having a SDTAS structure having a trench stacked capacitor which includes a capacitor charge storage electrode which is in physical contact and is electrically connected to a N+ drain region, and a VCC/2 electrode which is electrically isolated by an ONO layer formed between the capacito...

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Bibliographic Details
Main Authors OM JAE CHUL, CHUNG IN SOOL KIM JIN HYUNG, KIM JAE WON, YOON HAN SUB
Format Patent
LanguageItalian
Published 18.05.1992
Edition5
Subjects
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