Apparatus and method to find a maximum or minimum of a set of numbers
An apparatus for determining a maximum or minimum of a set of numbers includes a first comparator (3) having a latency of at least one clock cycle to compare a current number with a current best score and to output a corresponding first comparator signal (7) and a second comparator (13) having a lat...
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Format | Patent |
Language | English |
Published |
08.12.2010
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Subjects | |
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Abstract | An apparatus for determining a maximum or minimum of a set of numbers includes a first comparator (3) having a latency of at least one clock cycle to compare a current number with a current best score and to output a corresponding first comparator signal (7) and a second comparator (13) having a latency of at least one clock cycle to compare the current number with previous input number and to output a corresponding second comparator signal (18). A combinatorial logic block (15) receives the comparator signals and outputs a corresponding signal (20) dependent on a flag signal (21) indicating whether the current best number was updated for a preceding input number while the current number was being processed. A switch (6) outputs either the current best number, or the current number, as a new current best number, dependent on signal (20). A resultant reduction in logic steps processed in each clock cycle permits an increased clock frequency compared with the prior art. |
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AbstractList | An apparatus for determining a maximum or minimum of a set of numbers includes a first comparator (3) having a latency of at least one clock cycle to compare a current number with a current best score and to output a corresponding first comparator signal (7) and a second comparator (13) having a latency of at least one clock cycle to compare the current number with previous input number and to output a corresponding second comparator signal (18). A combinatorial logic block (15) receives the comparator signals and outputs a corresponding signal (20) dependent on a flag signal (21) indicating whether the current best number was updated for a preceding input number while the current number was being processed. A switch (6) outputs either the current best number, or the current number, as a new current best number, dependent on signal (20). A resultant reduction in logic steps processed in each clock cycle permits an increased clock frequency compared with the prior art. |
Author | ANTHONY RICHARD HUGGETT |
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Notes | Application Number: GB20050022084 |
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Snippet | An apparatus for determining a maximum or minimum of a set of numbers includes a first comparator (3) having a latency of at least one clock cycle to compare a... |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | Apparatus and method to find a maximum or minimum of a set of numbers |
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