3D INDUCTOR DESIGN USING BUNDLE SUBSTRATE VIAS

• Main Authors: DUTTA, Ranadeep, KIM, Jonghae, LAN, Je-Hsiung
• Format: Patent
• Language: English; French; German
• Published: 24.04.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A three dimensional (3D) inductor is described. The 3D inductor includes a first plurality of micro-through substrate vias (TSVs) within a first area of a substrate. The 3D inductor also includes a first trace on a first surface of the substrate, coupled to a first end of the first plurality of micr...