INSERTING A PROXY READ INSTRUCTION IN AN INSTRUCTION PIPELINE IN A PROCESSOR
Inserting a proxy read instruction in an instruction pipeline in a processor is disclosed. A scheduler circuit is configured to recognize when a produced value generated by execution of a producer instruction in the instruction pipeline will not be available through a data forwarding path to be cons...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
07.06.2023
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Subjects | |
Online Access | Get full text |
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