NEURAL NETWORK MEMORY
An example apparatus can include a memory array and a memory controller. The memory array can include a first portion including a first plurality of memory cells. The memory array can further include a second portion including a second plurality of memory cells. The memory controller can be coupled...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English French German |
Published |
30.08.2023
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | An example apparatus can include a memory array and a memory controller. The memory array can include a first portion including a first plurality of memory cells. The memory array can further include a second portion including a second plurality of memory cells. The memory controller can be coupled to the first portion and the second portion. The memory controller can be configured to operate the first plurality of memory cells for short-term memory operations. The memory controller can be further configured to operate the second plurality of memory cells for long-term memory operations. |
---|---|
Bibliography: | Application Number: EP20200834422 |