SYSTEM AND METHOD FOR CONFIGURABLE SYSTOLIC ARRAY WITH PARTIAL READ/WRITE

A system is provided that includes a reconfigurable systolic array circuitry. The reconfigurable systolic array circuitry includes a first circuit block comprising one or more groups of processing elements and a second circuit block comprising one or more groups of processing elements. The reconfigu...

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Bibliographic Details
Main Authors HUGHES, Christopher Justin, PILLAI, Kamlesh R, KALSI, Gurpreet Singh
Format Patent
LanguageEnglish
French
German
Published 30.06.2021
Subjects
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