EXECUTING AN OPERATING SYSTEM ON PROCESSORS HAVING DIFFERENT INSTRUCTION SET ARCHITECTURES
An apparatus includes a first processor having a first instruction set and a second processor having a second instruction set that is different than the first instruction set. The apparatus also includes a memory storing at least a portion of an operating system. The operating system is concurrently...
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Main Authors | , , , , , |
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Format | Patent |
Language | English French German |
Published |
14.08.2019
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Subjects | |
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Abstract | An apparatus includes a first processor having a first instruction set and a second processor having a second instruction set that is different than the first instruction set. The apparatus also includes a memory storing at least a portion of an operating system. The operating system is concurrently executable on the first processor and the second processor. |
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AbstractList | An apparatus includes a first processor having a first instruction set and a second processor having a second instruction set that is different than the first instruction set. The apparatus also includes a memory storing at least a portion of an operating system. The operating system is concurrently executable on the first processor and the second processor. |
Author | CODRESCU, Lucian PLONDKE, Erich J KUO, Richard POTOPLYAK, Pavel BAYERDORFFER, Bryan C MCDONALD, Michael R |
Author_xml | – fullname: MCDONALD, Michael R – fullname: PLONDKE, Erich J – fullname: POTOPLYAK, Pavel – fullname: KUO, Richard – fullname: BAYERDORFFER, Bryan C – fullname: CODRESCU, Lucian |
BookMark | eNqNiksKwjAQQLPQhb87zAUEtXTRZYgTk4VJmJmKuilF4kraQr0_fvAArh6P9-Zq0vVdnqkrntHU4sMBdICYkPRX-MKCR4gBEkWDzJEYnD592t5bi4RBwAcWqo3498cooMk4L2ikJuSlmt7bx5hXPy4UWBTj1nnomzwO7S13-dlgKspduakqvS3-WF6B_zPa |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
DocumentTitleAlternate | EXÉCUTION D'UN SYSTÈME D'EXPLOITATION SUR DES PROCESSEURS AYANT DIFFÉRENTES ARCHITECTURES DE JEUX D'INSTRUCTIONS AUSFÜHRUNG EINES BETRIEBSSYSTEMS AUF PROZESSOREN MIT VERSCHIEDENEN BEFEHLSSATZARCHITEKTUREN |
ExternalDocumentID | EP3525099A1 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_EP3525099A13 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 30 05:41:25 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English French German |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_EP3525099A13 |
Notes | Application Number: EP20190156727 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190814&DB=EPODOC&CC=EP&NR=3525099A1 |
ParticipantIDs | epo_espacenet_EP3525099A1 |
PublicationCentury | 2000 |
PublicationDate | 20190814 |
PublicationDateYYYYMMDD | 2019-08-14 |
PublicationDate_xml | – month: 08 year: 2019 text: 20190814 day: 14 |
PublicationDecade | 2010 |
PublicationYear | 2019 |
RelatedCompanies | QUALCOMM INCORPORATED |
RelatedCompanies_xml | – name: QUALCOMM INCORPORATED |
Score | 3.2249525 |
Snippet | An apparatus includes a first processor having a first instruction set and a second processor having a second instruction set that is different than the first... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | EXECUTING AN OPERATING SYSTEM ON PROCESSORS HAVING DIFFERENT INSTRUCTION SET ARCHITECTURES |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190814&DB=EPODOC&locale=&CC=EP&NR=3525099A1 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1Lb4JAEJ4Y-7y1to32lT003EylPIQDaXBZqk0EAquxvRjENfGCptL073d2o7aX9ga7yQY-MjvfzHw7ADy4hYNeNUfm5hR2G-Mvo-12Fzp-ENGZP83tuRCyojuM7P7IfJ1Ykxosd2dhVJ_QL9UcES2qQHuv1H69_kliBUpbuXmcLXFo9RxyL9C20TF6N0c3taDnsSQOYqpRildalHqy6yeSIR8DpQNk0V2p_mLjnjyUsv7tUcIzOExwsbI6h5ooG3BCdz9ea8DxcFvvbsCREmgWGxzcGuHmAt7ZhNERH0QvxI9InDCZZ8Kb7C3jbEjiiCRpTBHYOM1I3x_LuWAQhixlEScYrfN0pKQjJGOcyGoRbl9Uyh-ySyAh47Tfxsed7qGZsmT_YsYV1MtVKZpAhGHYudVFLAQytpnhWh07d5Bsubnl6mLRgtafy1z_M3cDpxJjmVLVzVuoVx-f4g59cjW7V2h-A3BgiIk |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8JAEJ4QfOBNUSM-92B6I1JLS3sgBrZbi9JH2oWgl6aUJeFSiNT4951tAL3ord1NNu23mZ1vngtwb2UmatUUmZuZGU20v7Sm1ZmruCGiNXucGTMhZETX8w131H6Z6JMKLLa1MGWf0K-yOSJKVIbyXpTn9erHiWWXuZXrh-kCh5ZPDu_aysY6Ru1mqm3F7ndZGNgBVSjFJ8WPurLrJ5KhHhpKe8iwTdlmn437sihl9VujOMewH-JieXECFZHXoUa3F6_V4dDbxLvrcFAmaGZrHNwI4foU3tmE0REf-M-k55MgZNLPhC_xW8yZRwKfhFFAEdggionbG8s5e-A4LGI-J2it82hUpo6QmHEio0V4fFGZ_hCfAXEYp24TPzfZQZOwcPdj2jlU82UuLoAITTNSvYNYCGRsU83SW0ZqItmyUt1SxbwBjT-Xufxn7g5qLveGyXDgv17BkcRbulfV9jVUi49PcYP6uZjelsh-A__ki3k |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=EXECUTING+AN+OPERATING+SYSTEM+ON+PROCESSORS+HAVING+DIFFERENT+INSTRUCTION+SET+ARCHITECTURES&rft.inventor=MCDONALD%2C+Michael+R&rft.inventor=PLONDKE%2C+Erich+J&rft.inventor=POTOPLYAK%2C+Pavel&rft.inventor=KUO%2C+Richard&rft.inventor=BAYERDORFFER%2C+Bryan+C&rft.inventor=CODRESCU%2C+Lucian&rft.date=2019-08-14&rft.externalDBID=A1&rft.externalDocID=EP3525099A1 |