MULTIPLE-CHIP PACKAGE WITH MULTIPLE THERMAL INTERFACE MATERIALS
A multiple chip package is described with multiple thermal interface materials. In one example, a package has a substrate, a first semiconductor die coupled to the substrate, a second semiconductor die coupled to the substrate, a heat spreader coupled to the die, wherein the first die has a first di...
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Main Authors | , , , |
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Format | Patent |
Language | English French German |
Published |
21.11.2018
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Subjects | |
Online Access | Get full text |
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Summary: | A multiple chip package is described with multiple thermal interface materials. In one example, a package has a substrate, a first semiconductor die coupled to the substrate, a second semiconductor die coupled to the substrate, a heat spreader coupled to the die, wherein the first die has a first distance to the heat spreader and the second die has a second distance to the heat spreader, a first filled thermal interface material (TIM) between the first die and the heat spreader to mechanically and thermally couple the heat spreader to the die, and a second filled TIM between the second die and the heat spreader to mechanically and thermally couple the heat spreader to the second die. |
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Bibliography: | Application Number: EP20160885297 |