MEMORY CONTROL METHOD AND MEMORY CONTROL APPARATUS

The present invention provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having at least a first memory cell, an initial status of the first memory cell being at an erase state; receiving and reading out a to-be stored data to obtain a targe...

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Bibliographic Details
Main Author ZHOU, Shicong
Format Patent
LanguageEnglish
French
German
Published 31.05.2017
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Abstract The present invention provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having at least a first memory cell, an initial status of the first memory cell being at an erase state; receiving and reading out a to-be stored data to obtain a targeted address of the to-be-stored data; reading out data in each of the plurality of memory cells; determining if a data status of a memory cell corresponding to the targeted address is at a valid state according to the targeted address; performing a programming operation to the first memory cell to write the to-be-stored data into the first memory cell when the data status of the memory cell corresponding to the targeted address is at the valid state; and performing an erase operation to the memory cell corresponding to the targeted address to prepare a next data write operation.
AbstractList The present invention provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having at least a first memory cell, an initial status of the first memory cell being at an erase state; receiving and reading out a to-be stored data to obtain a targeted address of the to-be-stored data; reading out data in each of the plurality of memory cells; determining if a data status of a memory cell corresponding to the targeted address is at a valid state according to the targeted address; performing a programming operation to the first memory cell to write the to-be-stored data into the first memory cell when the data status of the memory cell corresponding to the targeted address is at the valid state; and performing an erase operation to the memory cell corresponding to the targeted address to prepare a next data write operation.
Author ZHOU, Shicong
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DocumentTitleAlternate SPEICHERSTEUERUNGSVERFAHREN UND SPEICHERSTEUERUNGSVORRICHTUNG
PROCÉDÉ DE COMMANDE DE MÉMOIRE ET APPAREIL DE COMMANDE DE MÉMOIRE
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RelatedCompanies Semiconductor Manufacturing International Corporation (Shanghai)
Semiconductor Manufacturing International Corporation (Beijing)
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Snippet The present invention provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having at least a first...
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SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
Title MEMORY CONTROL METHOD AND MEMORY CONTROL APPARATUS
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