CARRIER-BONDING METHODS AND ARTICLES FOR SEMICONDUCTOR AND INTERPOSER PROCESSING

A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefr...

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Main Authors KEECH, John Tyler, SHOREY, Aric Bruce, ENICKS, Darwin Gene, THOMAS, Windsor Pipes, III
Format Patent
LanguageEnglish
French
German
Published 14.09.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Abstract A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers (56) having arrays (50) of vias (60) may be formed on the thin sheet, and devices (66) formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.
AbstractList A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers (56) having arrays (50) of vias (60) may be formed on the thin sheet, and devices (66) formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.
Author SHOREY, Aric Bruce
ENICKS, Darwin Gene
THOMAS, Windsor Pipes, III
KEECH, John Tyler
Author_xml – fullname: KEECH, John Tyler
– fullname: SHOREY, Aric Bruce
– fullname: ENICKS, Darwin Gene
– fullname: THOMAS, Windsor Pipes, III
BookMark eNrjYmDJy89L5WQIcHYMCvJ0DdJ18vdz8fRzV_B1DfHwdwlWcPRzUXAMCvF09nENVnDzD1IIdvX1dAYqCnUOAfJA0p5-Ia5BAf7BrkEKAUH-zq7BwUADeBhY0xJzilN5oTQ3g4Kba4izh25qQX58anFBYnJqXmpJvGuAsYGphamFuZOhMRFKAF0PMLw
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
DocumentTitleAlternate PROCÉDÉS DE LIAISON DE SUPPORT ET ARTICLES PERMETTANT UN TRAITEMENT DE SEMI-CONDUCTEUR ET D'INTERPOSEUR
BONDINGVERFAHREN FÜR TRÄGER UND ARTIKEL FÜR HALBLEITER- UND ZWISCHENSTÜCKVERARBEITUNG
ExternalDocumentID EP3058587B1
GroupedDBID EVB
ID FETCH-epo_espacenet_EP3058587B13
IEDL.DBID EVB
IngestDate Fri Jul 19 15:17:10 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
French
German
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_EP3058587B13
Notes Application Number: EP20140789946
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220914&DB=EPODOC&CC=EP&NR=3058587B1
ParticipantIDs epo_espacenet_EP3058587B1
PublicationCentury 2000
PublicationDate 20220914
PublicationDateYYYYMMDD 2022-09-14
PublicationDate_xml – month: 09
  year: 2022
  text: 20220914
  day: 14
PublicationDecade 2020
PublicationYear 2022
RelatedCompanies Corning Incorporated
RelatedCompanies_xml – name: Corning Incorporated
Score 3.4190688
Snippet A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title CARRIER-BONDING METHODS AND ARTICLES FOR SEMICONDUCTOR AND INTERPOSER PROCESSING
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220914&DB=EPODOC&locale=&CC=EP&NR=3058587B1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8JAEJ4QNOpNUSO-sgfTW6NZ6HY9EEN3F6ixj7TFcCOUloRLIVLj33d2A-hFb_vKZHey8_j2MQPwwPLuMys5s9GWIUBxdSL3GV3YM8bdYp4XjJpg1UHIRuPu68SZNGC5-wtj4oR-meCIKFFzlPfa6Ov1zyGWNG8rN4_5EptWL4OsJ60tOqYUzV_Xkl5PxZGMhCUElqww6eG25g53PQRKB-hFu1oY1LunP6Wsf1uUwSkcxkisqs-gUVYtOBa7xGstOAq2991Y3Ire5hxi0U8SXyW2F4XSD4ckUNkokinph5KgV-qLN5USxHQk1azFQWORYU13m7i3cZSqhMRJJLQGDYcXQAYqEyMbpzbds2Gq4v0iOpfQrFZVeQUEnePFvNRAopyha0O5Q4sntuAdfafCqduG9p9krv_pu4ETk_jEnDbcQrP--Czv0P7W-b3h3DflEoH9
link.rule.ids 230,309,783,888,25576,76876
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8hasSbokb87MHstqhlbPVADOsKm7Ju2YbhRhiMhMsgMuO_72sD6EVvbV_TtC99H7--9hXg3s6tZ7tgtom2DAGKoz5yn9C5ObGZM5vmM5vqZNWhtP2h9Tpqj2qw2L6F0XlCv3RyRJSoKcp7pfX16ucQy9N3K9cP-QKbli-9rOMZG3RMKZo_y_DcjogjL-IG51gyZNLBbc3azHERKO2jh-0oYRDvrnqUsvptUXrHcBDjYGV1ArWibECdbz9ea8BhuIl3Y3EjeutTiHk3SQKRmG4kvUD2SSgyP_JS0pUeQa804AOREsR0JFWsxU5DnmFNkXXe2zhKRULiJOJKg8r-GZCeyLhv4tTGOzaMRbxbROsc9splWVwAQed4Pi0UkCgm6NpQ1qazR3vOWiqmwqjThOafw1z-Q7uDup-Fg_EgkG9XcKR4q65JPFnXsFd9fBY3aIur_FZz8RsrpoT-
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=CARRIER-BONDING+METHODS+AND+ARTICLES+FOR+SEMICONDUCTOR+AND+INTERPOSER+PROCESSING&rft.inventor=KEECH%2C+John+Tyler&rft.inventor=SHOREY%2C+Aric+Bruce&rft.inventor=ENICKS%2C+Darwin+Gene&rft.inventor=THOMAS%2C+Windsor+Pipes%2C+III&rft.date=2022-09-14&rft.externalDBID=B1&rft.externalDocID=EP3058587B1