A METHOD OF MAKING A SPLIT GATE NON-VOLATILE FLOATING GATE MEMORY CELL HAVING A SEPARATE ERASE GATE, AND A MEMORY CELL MADE THEREBY

• Main Authors: ZHANG, YI, WANG, SHIUH, LUEN, QIAO, BAOWEI, ZHANG, ZUFA, WANG, CHUNMING, LU, WEN-JUEI
• Format: Patent
• Language: English; French; German
• Published: 29.07.2015
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A non-volatile memory cell has a single crystalline substrate of a first conductivity type with a top surface. A first region of a second conductivity type is in the substrate along the top surface. A second region of the second conductivity type is in the substrate along the top surface, spaced apart from the first region. A channel region is the first region and the second region. A word line gate is positioned over a first portion of the channel region, immediately adjacent to the first region. The word line gate is spaced apart from the channel region by a first insulating layer. A floating gate is positioned over another portion of the channel region. The floating gate has a lower surface separated from the channel region by a second insulating layer, and an upper surface opposite the lower surface. The floating gate has a first side wall adjacent to but separated from the word line gate; and a second side wall opposite the first side wall. The second side wall and the upper surface form a sharp edge, with the second side wall greater in length than the first side wall. The upper surface slopes upward from the first side wall to the second side wall. A coupling gate is positioned over the upper surface of the floating gate and is insulated therefrom by a third insulating layer. An erase gate is positioned adjacent to the second side wall of the floating gate. The erase gate is positioned over the second region and insulated therefrom.