Method for manufacturing a microelectronic device equipped with semiconductor areas on an insulator with horizontal Ge concentration gradient
The method involves forming an oxidation mask on a silicon on insulator support (100), where the mask comprises holes revealing a silicon based semi-conductor zone and comprising inclined flanks. Silicon-germanium based semiconductor zones (130) are formed on the silicon based semi-conductor zone. T...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
23.12.2015
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Subjects | |
Online Access | Get full text |
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Summary: | The method involves forming an oxidation mask on a silicon on insulator support (100), where the mask comprises holes revealing a silicon based semi-conductor zone and comprising inclined flanks. Silicon-germanium based semiconductor zones (130) are formed on the silicon based semi-conductor zone. The semi-conductor zones are thermally oxidized through the mask. The germanium concentration of the silicon-germanium based semiconductor zones ranges between 5 and 40 percentages. |
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Bibliography: | Application Number: EP20090170352 |