INTEGRATED MEMORY CIRCUIT ARRANGEMENT IN PARTICULAR A UNIFORM-CHANNEL-PROGRAMMING FLASH MEMORY
A memory circuit arrangement includes a switching element per column that can be used to connect or disconnect two bit lines for memory cells of a column. The switching element leads to a reduction of the chip area and/or to an improvement in the electronic properties of the memory circuit arrangeme...
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Main Author | |
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Format | Patent |
Language | English French German |
Published |
06.10.2010
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Subjects | |
Online Access | Get full text |
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