Printed circuit board and method for manufacturing printed circuit board
An insulating layer (1) made of an insulator film or the like is prepared. Then, a thin metal film (2) and a thin copper film (3) are formed in sequence on the insulating layer. The thin copper film is subsequently laminated with a dry film or the like, and exposed and developed to form a plating re...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
13.05.2009
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Subjects | |
Online Access | Get full text |
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Abstract | An insulating layer (1) made of an insulator film or the like is prepared. Then, a thin metal film (2) and a thin copper film (3) are formed in sequence on the insulating layer. The thin copper film is subsequently laminated with a dry film or the like, and exposed and developed to form a plating resist thereon that have patterns opposite to conductor patterns which are formed in a subsequent step. This is followed by forming conductor patterns (5) made of copper, by electrolytic plating using an electrolytic copper sulfate plating solution, on the surfaces of the thin copper film where the plating resist is not formed. The plating resist is then removed by, for example, stripping. After this, the thin copper film is held at a temperature of not less than 200°C and not more than 300°C for approximately an hour to be thermally treated. Then, the thin copper film (3) and the thin metal film (2) are removed by chemical etching except the portions under the conductor patterns (5). |
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AbstractList | An insulating layer (1) made of an insulator film or the like is prepared. Then, a thin metal film (2) and a thin copper film (3) are formed in sequence on the insulating layer. The thin copper film is subsequently laminated with a dry film or the like, and exposed and developed to form a plating resist thereon that have patterns opposite to conductor patterns which are formed in a subsequent step. This is followed by forming conductor patterns (5) made of copper, by electrolytic plating using an electrolytic copper sulfate plating solution, on the surfaces of the thin copper film where the plating resist is not formed. The plating resist is then removed by, for example, stripping. After this, the thin copper film is held at a temperature of not less than 200°C and not more than 300°C for approximately an hour to be thermally treated. Then, the thin copper film (3) and the thin metal film (2) are removed by chemical etching except the portions under the conductor patterns (5). |
Author | YAMATO, TAKESHI NAKAMURA, KEI |
Author_xml | – fullname: NAKAMURA, KEI – fullname: YAMATO, TAKESHI |
BookMark | eNrjYmDJy89L5WTwCCjKzCtJTVFIzixKLs0sUUjKTyxKUUjMS1HITS3JyE9RSMsvUshNzCtNS0wuKQUqTlcowKaFh4E1LTGnOJUXSnMzKLi5hjh76KYW5MenFhckJqfmpZbEuwYYmhkaGxqbOhkaE6EEAHCLNdA |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
DocumentTitleAlternate | Carte à circuit imprimé et procédé de fabrication d'une carte à circuit imprimé Leiterplatte und Verfahren zur Herstellung einer Leiterplatte |
ExternalDocumentID | EP1613135B1 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_EP1613135B13 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 14:17:04 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English French German |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_EP1613135B13 |
Notes | Application Number: EP20050254062 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090513&DB=EPODOC&CC=EP&NR=1613135B1 |
ParticipantIDs | epo_espacenet_EP1613135B1 |
PublicationCentury | 2000 |
PublicationDate | 20090513 |
PublicationDateYYYYMMDD | 2009-05-13 |
PublicationDate_xml | – month: 05 year: 2009 text: 20090513 day: 13 |
PublicationDecade | 2000 |
PublicationYear | 2009 |
RelatedCompanies | NITTO DENKO CORPORATION |
RelatedCompanies_xml | – name: NITTO DENKO CORPORATION |
Score | 2.7405436 |
Snippet | An insulating layer (1) made of an insulator film or the like is prepared. Then, a thin metal film (2) and a thin copper film (3) are formed in sequence on the... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
Title | Printed circuit board and method for manufacturing printed circuit board |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090513&DB=EPODOC&locale=&CC=EP&NR=1613135B1 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5KFfWmVbG-2IPkFkyabpscgpAXQWgbpEpvJfsI5GAS0oT-fSdpUz2ot2GXHWZ3mZ1vdnZmAZ64wQUViaZyqWnqeKRz1YqRMmkspZ4waySaC_3ZfBK-j19XdNWDtMuFaeuEbtviiKhRHPW9as_r4vsSy2vfVm6eWYpN-UuwtD2l846balOG4jm2Hy28hau4LlLK_M1GYGPoBnXQUTpCFD1tXn_5H06TlFL8tCjBORxHyCyrLqAnswGcut3HawM4me3j3UjuVW9zCWFUNqUdBOFpyeu0IizHzSVxJsjuF2iC8JN8xlnd5Cq0yYek-G3IFZDAX7qhiiKtD9Nf-9FBeOMa-lmeyRsgFiKZUSIlml8E-Qw9J52bbGpKak5EYvIhDP9kc_tP3x2c7QImVNWNe-hXZS0f0O5W7LFdsS91mYiS |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT4NAEJ401VhvWjXW5x4MNyKUUuFATHgFtVBi0PRGYFkSDgKhEP--Ay3Vg3qb7GY3-8jsfLOz8y3AHZVoIiepwFMmCPxsKlJejVBS5IgxMY3VadJe6Lve3HmbPa_k1QCyPhem4wn97MgRUaMo6nvdndfl9yWW2b2tXN_HGRYVj3agmVzvHbdsUxJn6prlL82lwRkGSpz3qiGwkURJ1tFR2kOErbQ0-9a73iallD8tin0E-z52ltfHMGD5GEZG__HaGA7cbbwbxa3qrU_A8auW2iEhNKtok9UkLnBzSZQnZPMLNEH4ST6ivGlzFbrkQ1L-1uQUiG0FhsPjkMLd9EPL3w1eOoNhXuTsHIiKSGaaMobmF0F-jJ6TSJX4QWGyMk9ShU5g8mc3F__U3cLICdxFuHjyXi7hcBM8kXlRuoJhXTXsGm1wHd90q_cFBSyLgg |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Printed+circuit+board+and+method+for+manufacturing+printed+circuit+board&rft.inventor=NAKAMURA%2C+KEI&rft.inventor=YAMATO%2C+TAKESHI&rft.date=2009-05-13&rft.externalDBID=B1&rft.externalDocID=EP1613135B1 |