EP0525942
A lithographic process for integrated circuit processing uses a two-level resist to reduce variations in nominally identical feature sizes as printed in the resist(e.g. 7) and as transferred into the substrate(e.g. 1), resulting from complex topography on the substrate surface.
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
02.03.1994
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Edition | 5 |
Subjects | |
Online Access | Get full text |
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