Verfahren und Anordnung zur Freilassung von Funktionseinheiten in einem multithreaded VLIW-Prozessor

A method and apparatus are disclosed for releasing functional units in a multithreaded very large instruction word (VLIW) processor. The functional unit release mechanism can retrieve the capacity lost due to multiple cycle instructions. The functional unit release mechanism of the present invention...

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Main Authors JEREMIASSEN, TOR E, KAXIRAS, STEFANOS, HEINTZE, NEVIN, BERENBAUM, ALAN DAVID
Format Patent
LanguageGerman
Published 28.08.2008
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Abstract A method and apparatus are disclosed for releasing functional units in a multithreaded very large instruction word (VLIW) processor. The functional unit release mechanism can retrieve the capacity lost due to multiple cycle instructions. The functional unit release mechanism of the present invention permits idle functional units to be reallocated to other threads, thereby improving workload efficiency. Instruction packets are assigned to functional units, which can maintain their state, independent of the issue logic. Each functional unit has an associated state machine (SM) that keeps track of the number of cycles that the functional unit will be occupied by a multiple-cycle instruction. Functional units do not reassign themselves as long as the functional unit is busy. When the instruction is complete, the functional unit can participate in functional unit allocation, even if other functional units assigned to the same thread are still busy. The functional unit release approach of the present invention allows the functional units that are not associated with a multiple-cycle instruction to be allocated to other threads while the blocked thread is waiting, thereby improving throughput of the multithreaded VLIW processor. Since the state is associated with each functional unit separately from the instruction issue unit, the functional units can be assigned to threads independently of the state of any one thread and its constituent instructions.
AbstractList A method and apparatus are disclosed for releasing functional units in a multithreaded very large instruction word (VLIW) processor. The functional unit release mechanism can retrieve the capacity lost due to multiple cycle instructions. The functional unit release mechanism of the present invention permits idle functional units to be reallocated to other threads, thereby improving workload efficiency. Instruction packets are assigned to functional units, which can maintain their state, independent of the issue logic. Each functional unit has an associated state machine (SM) that keeps track of the number of cycles that the functional unit will be occupied by a multiple-cycle instruction. Functional units do not reassign themselves as long as the functional unit is busy. When the instruction is complete, the functional unit can participate in functional unit allocation, even if other functional units assigned to the same thread are still busy. The functional unit release approach of the present invention allows the functional units that are not associated with a multiple-cycle instruction to be allocated to other threads while the blocked thread is waiting, thereby improving throughput of the multithreaded VLIW processor. Since the state is associated with each functional unit separately from the instruction issue unit, the functional units can be assigned to threads independently of the state of any one thread and its constituent instructions.
Author KAXIRAS, STEFANOS
HEINTZE, NEVIN
JEREMIASSEN, TOR E
BERENBAUM, ALAN DAVID
Author_xml – fullname: JEREMIASSEN, TOR E
– fullname: KAXIRAS, STEFANOS
– fullname: HEINTZE, NEVIN
– fullname: BERENBAUM, ALAN DAVID
BookMark eNqNjLsKwkAQRbfQwtc_DPYBk4i9aIKChUWIZViyE7OYzIaZXYt8vRH8AKvDgXPvUs3IES6UKZEb3TISBDJwJMeGAj1hDAw5o-20yNffjiAP9PLWkaClFq2fRpZgEuyhD523fjrSBg2Ut-sjurMbUcTxWs0b3QluflypbZ4Vp0uEg6tQBl0joa_O2WEXp3ES74siSf-KPgh2Qc0
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
ExternalDocumentID DE60131214TT2
GroupedDBID EVB
ID FETCH-epo_espacenet_DE60131214TT23
IEDL.DBID EVB
IngestDate Fri Aug 30 05:43:00 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language German
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_DE60131214TT23
Notes Application Number: DE20016031214T
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080828&DB=EPODOC&CC=DE&NR=60131214T2
ParticipantIDs epo_espacenet_DE60131214TT2
PublicationCentury 2000
PublicationDate 20080828
PublicationDateYYYYMMDD 2008-08-28
PublicationDate_xml – month: 08
  year: 2008
  text: 20080828
  day: 28
PublicationDecade 2000
PublicationYear 2008
RelatedCompanies AGERE SYSTEMS GUARDIAN CORP
RelatedCompanies_xml – name: AGERE SYSTEMS GUARDIAN CORP
Score 2.7093627
Snippet A method and apparatus are disclosed for releasing functional units in a multithreaded very large instruction word (VLIW) processor. The functional unit...
SourceID epo
SourceType Open Access Repository
SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title Verfahren und Anordnung zur Freilassung von Funktionseinheiten in einem multithreaded VLIW-Prozessor
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080828&DB=EPODOC&locale=&CC=DE&NR=60131214T2
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFA5jXt90KupUgkjfii5tuu6hCOuFKboNqXNvo2lTrGI6ulZhv96T7KJPe8wJHJLAdy7Jd04QuqEtHrO7TqobzDbk1Q1gjkREj5OOyQhjEWWK5du3eq_m45iOa-hjVQuj-oT-qOaIgKgY8F4qez39u8TyFLdydssyEOX3Qeh42io7tmVHNs3rOv5w4A1czXUdz9f6L44l-8qQlhmCud6CMLot6V_-qCurUqb_XUpwgLaHoE2Uh6iW8Abac1c_rzXQ7vPywbuBdhRDM56BcInC2RFKRrxII8mTw5VIMGTwRSIAtHheFTgoeCYjYjn-zgUOKvG54Exn4p1DgClwJjAM-BdWbMISFEUJT_Do6eFNHxb5HIxfXhyj68AP3Z4OC5-sT2ni-es9hsQ4QXWRC36KMOQcFo3sNqFpx4R0JSJmalEjahvUjElqnKHmBkXnG2ebaH_BnwC02ReoXhYVvwQnXbIrdbq_RdOXaA
link.rule.ids 230,309,783,888,25578,76884
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFA5jXuabTkWdlyDSt6JL2617KMJ6YdPdkDr3Npo2xSqmo2sV9us9yS76tMckcEgC38k5yXe-IHRn1FlIH1qxqlFTE1c3gDkSEDWMWjollAYGlSzfQaPzqj9NjEkJfaxrYaRO6I8URwREhYD3XPrr2d8lliO5lfN7mkBX-uj5lqOss2NTKLIpTttyR0NnaCu2bTmuMnixGkJXhtR1H9z1DoTYptDZd8dtUZUy-3-keIdodwTWeH6EShGrooq9_nmtivb7qwfvKtqTDM1wDp0rFM6PUTRmWRwInhwueIQhg88iDqDFiyLDXsYSERGL9nfKsVfwzyVnOuHvDAJMjhOOocG-sGQT5mAoiFiEx73umzrK0gU4vzQ7Qbee69sdFSY-3ezS1HE3a_SJdorKPOXsDGHIORpGYDaJEbd0SFcCoscNQwuamqGHJNbOUW2LoYutozeo0vH7vWmvO3iuoYMllwKQZ16icp4V7AoO7Jxey53-BYgWmlg
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Verfahren+und+Anordnung+zur+Freilassung+von+Funktionseinheiten+in+einem+multithreaded+VLIW-Prozessor&rft.inventor=JEREMIASSEN%2C+TOR+E&rft.inventor=KAXIRAS%2C+STEFANOS&rft.inventor=HEINTZE%2C+NEVIN&rft.inventor=BERENBAUM%2C+ALAN+DAVID&rft.date=2008-08-28&rft.externalDBID=T2&rft.externalDocID=DE60131214TT2