DE4114410

In a nonvolatile semiconductor memory device having a plurality of word lines, bit lines, sense lines, nonvolatile semiconductor memory cells, column selecting transistors, a page buffer circuit, data lines, an input driver/sense amplifier, an input buffer an input/output register and a comparator,...

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Bibliographic Details
Main Authors DO, JAE-YOUNG, SUWON, KR, WEON, DAE-SIK, HWANGBO, JUN-SIK, SEOUL/SOUL, KR
Format Patent
LanguageEnglish
Published 24.06.1993
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:In a nonvolatile semiconductor memory device having a plurality of word lines, bit lines, sense lines, nonvolatile semiconductor memory cells, column selecting transistors, a page buffer circuit, data lines, an input driver/sense amplifier, an input buffer an input/output register and a comparator, a secret access code is defined in such a manner that a first secret access code is latched in the page buffer circuit, a second secret access code inputted by the input buffer is compared with the first secret access code read by the input/output register by bytes in the comparator, and if the first and second access codes match, the first secret access code latched in the page buffer is written in the cells of the row line designated in advance among the nonvolatile memory cells.
Bibliography:Application Number: DE19914114410