Verfahren zur Herstellung von Mehrebenenkontakten durch Dimensionierung von Kontaktgrössen in integrierten Schaltungen

A method [600] for forming an integrated circuit includes etching a first opening [228] [338] [402] to a first depth in a dielectric material [322] over a semiconductor device [317] on a first semiconductor substrate [202] and etching a second opening [230] [340] [404] to a second depth in the diele...

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Bibliographic Details
Main Authors HELLIG, KAY, AMINPUR, MASSUD
Format Patent
LanguageGerman
Published 27.04.2006
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Summary:A method [600] for forming an integrated circuit includes etching a first opening [228] [338] [402] to a first depth in a dielectric material [322] over a semiconductor device [317] on a first semiconductor substrate [202] and etching a second opening [230] [340] [404] to a second depth in the dielectric material [322] over the first semiconductor substrate [202]. The first and second openings [228] [338] [402] [230] [340] [404] are differently sized to respectively etch to the first and second depths in about the same time due to etch lag. The first and second openings [228] [338] [402] [230] [340] [404] are filled with conductive material.
Bibliography:Application Number: DE20031094263T