Semiconductor structure and test system

• Main Authors: LI JINGYI, ZHOU YUAN, ZHANG XIAOLIN, ZHU LINDI, ZHANG ZHIWEN, WANG CHAO, PEI ZIWEI
• Format: Patent
• Language: Chinese; English
• Published: 24.09.2019
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The utility model discloses a semiconductor structure and a test system. The semiconductor structure includes: a substrate; the doped layer is formed on the first surface of the substrate; and a plurality of trenches, each groove penetrates through the doped layer and extends into the substrate; wherein the plurality of grooves comprise at least one first groove and at least one second groove, each second groove is used for forming a grid electrode of the corresponding semiconductor device, and each first groove defines and isolates the test region with a closed-loop boundary in the doped layer. According to the semiconductor structure, the test region is formed while the semiconductor device is formed, and the test region comprises the doped layer and the first groove penetrating through the doped layer, so that the doped layer has a clear boundary, key parameters such as body region resistance of the semiconductor device can be more accurately represented, and the yield and reliability of products are impro