Production of non-volatile memory
The method comprises: sequentially forming a bottom dielectric layer, a charge-trapped layer, a top dielectric layer and a conducting layer; removing a portion of said conducting layer, top dielectric layer, charge-trapped layer, bottom layer and substrate to form multi trenches; filling out insulat...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
01.11.2006
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | The method comprises: sequentially forming a bottom dielectric layer, a charge-trapped layer, a top dielectric layer and a conducting layer; removing a portion of said conducting layer, top dielectric layer, charge-trapped layer, bottom layer and substrate to form multi trenches; filling out insulating layer in said trenches to form multi isolation structures; forming multi word lines on said conducting layer and isolation structures; using said word lines as mask to remove a portion of said bottom dielectric layer, charge-trapped layer, top dielectric layer, conducting layer and isolation structures to form multi component structures. Because the bottom dielectric layer has at least two thicknesses, the cell structure can have different properties so as to be taken as different memory cell or peripheral circuit component. |
---|---|
AbstractList | The method comprises: sequentially forming a bottom dielectric layer, a charge-trapped layer, a top dielectric layer and a conducting layer; removing a portion of said conducting layer, top dielectric layer, charge-trapped layer, bottom layer and substrate to form multi trenches; filling out insulating layer in said trenches to form multi isolation structures; forming multi word lines on said conducting layer and isolation structures; using said word lines as mask to remove a portion of said bottom dielectric layer, charge-trapped layer, top dielectric layer, conducting layer and isolation structures to form multi component structures. Because the bottom dielectric layer has at least two thicknesses, the cell structure can have different properties so as to be taken as different memory cell or peripheral circuit component. |
Author | JIANLONG,ZHUANG ZHU |
Author_xml | – fullname: JIANLONG,ZHUANG ZHU |
BookMark | eNrjYmDJy89L5WRQDCjKTylNLsnMz1PIT1MACuqW5ecklmTmpCrkpubmF1XyMLCmJeYUp_JCaW4GeTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DC1NTExMDR2PCKgDcOCbF |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | CN1855440A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_CN1855440A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 26 04:42:28 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_CN1855440A3 |
Notes | Application Number: CN200510065595 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061101&DB=EPODOC&CC=CN&NR=1855440A |
ParticipantIDs | epo_espacenet_CN1855440A |
PublicationCentury | 2000 |
PublicationDate | 20061101 |
PublicationDateYYYYMMDD | 2006-11-01 |
PublicationDate_xml | – month: 11 year: 2006 text: 20061101 day: 01 |
PublicationDecade | 2000 |
PublicationYear | 2006 |
RelatedCompanies | LIJING SEMICONDUCTOR CO., LTD |
RelatedCompanies_xml | – name: LIJING SEMICONDUCTOR CO., LTD |
Score | 2.6628332 |
Snippet | The method comprises: sequentially forming a bottom dielectric layer, a charge-trapped layer, a top dielectric layer and a conducting layer; removing a portion... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Production of non-volatile memory |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061101&DB=EPODOC&locale=&CC=CN&NR=1855440A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQAdb5qcBa0lI3OS3RWNfEIiUVmOfSLHWBylOA7eVUA8Mk0G5kXz8zj1ATrwjTCCaGDNheGPA5oeXgwxGBOSoZmN9LwOV1AWIQywW8trJYPykTKJRv7xZi66IG7x0DazNDNRcnW9cAfxd_ZzVnZ1tnPzW_IGAmB9abJgaOzAysoEY06JR91zAn0J6UAuQKxU2QgS0AaFZeiRADU2qeMAOnM-zeNWEGDl_odDeQCc15xSIMigGQo1mBLlPIT1MAdtp1gQUL0KU5qQq5oNWylaIM8m6uIc4eukC74uHeinf2gznKWIyBBagvVYJBwcTSxDDN3MLM3CjZ3CQpMRFYFiWlppqYGaWmmaQZmptLMkjgMkUKt5Q0Axd46AC8h06GgaWkqDRVFliZliTJgcMBABnreTI |
link.rule.ids | 230,309,786,891,25594,76903 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwdV3dS8MwED_mFOebTmXzaxWkb8V1i836UMSlK1XXrkiVvZWmS1BwH7iK-N97jev0ZW8hn5fA7365JHcBuELOF8iStpHJtGuQ3kQg5qRtYPUJ7pdF2-SFN3IQWv4zeRjfjCvwWvrCqDihXyo4IiIqQ7znSl8v_g6xXPW2cnnN3zBrfuvFjquvrWNkM1N3-84gGrkjpjPmsFAPnxDkyJukfbcF2xQNQmUovfQLn5TFf0Lx9mEnwr5m-QFUxKwONVb-u1aH3WB13Y3JFfKWh3AZ_YZmRcm0udTQaDdQsaCk70KbFq9lv4-g5Q1i5hs4VrKeVsLCUqjuMVSxnWiARmxiStqzaCejhKcp6iIuBLE6QhJpUtqExqZeTjYXtaDmx8EwGd6Hj6ewp44RlD_dGVTzj09xjsSa8wu1Jj_ppnwc |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Production+of+non-volatile+memory&rft.inventor=JIANLONG%2CZHUANG+ZHU&rft.date=2006-11-01&rft.externalDBID=A&rft.externalDocID=CN1855440A |