FPGA-oriented single event upset simulation system and simulation method

• Main Authors: SUN YONGSHU, WANG HAIBIN, SHE XIAYU, WANG LIANG
• Format: Patent
• Language: Chinese; English
• Published: 15.08.2023
• Subjects: CALCULATING; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses an FPGA-oriented single event upset simulation system and simulation method, and the system comprises a fault injection control system which is used for selecting a fault model, sending a fault injection instruction to control the fault injection system to carry out fault injection, and sending a fault injection instruction to the fault injection control system; receiving the output from the to-be-tested FPGA hardware and comparing the output with pre-acquired output data of the to-be-tested circuit under the fault-free condition so as to judge whether the to-be-tested FPGA hardware has a fault or not; the fault injection system is connected with the fault injection control unit and used for analyzing a fault injection instruction sent by the fault injection control unit and turning over a logic value of a configuration register on a specified address, and the problem that the fault injection technology based on simulation possibly lacks accuracy of a fault model and a system model is