Semiconductor element
The invention discloses a semiconductor element, which mainly comprises a gate structure arranged on a substrate and an epitaxial layer arranged beside the gate structure, the epitaxial layer includes a first buffer layer, a second buffer layer disposed on the first buffer layer, a body layer dispos...
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Main Authors | , |
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Format | Patent |
Language | Chinese English |
Published |
28.07.2023
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Subjects | |
Online Access | Get full text |
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Abstract | The invention discloses a semiconductor element, which mainly comprises a gate structure arranged on a substrate and an epitaxial layer arranged beside the gate structure, the epitaxial layer includes a first buffer layer, a second buffer layer disposed on the first buffer layer, a body layer disposed on the second buffer layer, a first cover layer disposed on the body layer, and a second cover layer disposed on the first cover layer. Wherein the bottom surface of the first buffer layer comprises a flat surface, the bottom surface of the second buffer layer comprises a curved surface, and the second buffer layer comprises a linear side wall.
本发明公开一种半导体元件,其主要包含一栅极结构设于一基底上以及一外延层设于该栅极结构旁,其中外延层包含第一缓冲层、第二缓冲层设于第一缓冲层上、主体层设于第二缓冲层上、第一遮盖层设于主体层上以及第二遮盖层设于第一遮盖层上。其中第一缓冲层底表面包含一平坦表面、第二缓冲层底表面包含一曲面,且第二缓冲层包含一直线侧壁。 |
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AbstractList | The invention discloses a semiconductor element, which mainly comprises a gate structure arranged on a substrate and an epitaxial layer arranged beside the gate structure, the epitaxial layer includes a first buffer layer, a second buffer layer disposed on the first buffer layer, a body layer disposed on the second buffer layer, a first cover layer disposed on the body layer, and a second cover layer disposed on the first cover layer. Wherein the bottom surface of the first buffer layer comprises a flat surface, the bottom surface of the second buffer layer comprises a curved surface, and the second buffer layer comprises a linear side wall.
本发明公开一种半导体元件,其主要包含一栅极结构设于一基底上以及一外延层设于该栅极结构旁,其中外延层包含第一缓冲层、第二缓冲层设于第一缓冲层上、主体层设于第二缓冲层上、第一遮盖层设于主体层上以及第二遮盖层设于第一遮盖层上。其中第一缓冲层底表面包含一平坦表面、第二缓冲层底表面包含一曲面,且第二缓冲层包含一直线侧壁。 |
Author | XU JIAZHE HE ZHEYI |
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Snippet | The invention discloses a semiconductor element, which mainly comprises a gate structure arranged on a substrate and an epitaxial layer arranged beside the... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Semiconductor element |
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