Low-power-consumption optimization method and device for recursive FFT (Fast Fourier Transform) processor
According to the low-power-consumption optimization method for the recursion type FFT processor, a twiddle factor generation unit based on a lookup table search method not only has an operation framework in the prior art, but also is additionally provided with additional judgment logic and control l...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
30.06.2023
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Subjects | |
Online Access | Get full text |
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Summary: | According to the low-power-consumption optimization method for the recursion type FFT processor, a twiddle factor generation unit based on a lookup table search method not only has an operation framework in the prior art, but also is additionally provided with additional judgment logic and control logic, so that the number of times of memory access and complex multiplication in the twiddle factor generation process is reduced, and the generation efficiency of the twiddle factor is improved. And the power consumption is effectively reduced. In addition, the twiddle factor calculation unit is responsible for performing complex multiplication operation on twiddle factors and butterfly operation results so as to obtain a final result, aiming at the operation process of the large-point two-dimensional FFT algorithm, phase factors are used for replacing the last-stage twiddle factors of column transformation, one-stage additional read-write memory access is reduced through an advanced calculation method, and the ca |
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Bibliography: | Application Number: CN202310374142 |