ESD protection device with isolation structure layout to minimize harmonic distortion

• Main Authors: JOOST WILLEMAN, TELLET EMMANUEL
• Format: Patent
• Language: Chinese; English
• Published: 30.05.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Embodiments of the present disclosure generally relate to an ESD protection device with an isolation structure layout that minimizes harmonic distortion. An ESD protection device includes a semiconductor body having an upper surface, a plurality of p-type wells each extending into the semiconductor...