Method for forming seam in isolation area

• Main Authors: HWANG TAE-GYUN, LU BAIQUAN, XU ZHI'AN
• Format: Patent
• Language: Chinese; English
• Published: 07.04.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method includes forming a first dummy gate stack on a protruding semiconductor fin, etching the first dummy gate stack to form a trench, extending the trench downward to penetrate a portion of the protruding semiconductor fin, and filling the trench with a dielectric material to form a fin isolation region. A seam is formed in the fin isolation region, and the seam extends to a horizontal plane lower than a top surface level of the protruding semiconductor fin. The top width of the seam is less than about 1 nm. The second dummy gate stack on the protruding semiconductor fin is replaced by a replacement gate stack. The embodiment of the invention relates to a method for forming a seam in an isolation region. 一种方法包括在突出半导体鳍上形成第一伪栅极堆叠件，蚀刻第一伪栅极堆叠件以形成沟槽，向下延伸沟槽以穿透突出半导体鳍的一部分，以及用介电材料填充沟槽以形成鳍隔离区。接缝形成在鳍隔离区中，并且接缝延伸至低于突出半导体鳍的顶面水平的水平面。接缝的顶部宽度小于约1nm。突出半导体鳍上的第二伪栅极堆叠件被替换栅极堆叠件替换。本申请的实施例涉及在隔离区形成接缝的方法。